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參數(shù)資料
型號: CD74HCT147M
廠商: Texas Instruments, Inc.
英文描述: LM78LXX Series 3-Terminal Positive Regulators; Package: MICRO SMD; No of Pins: 8
中文描述: 高速CMOS邏輯10至4線優(yōu)先編碼器
文件頁數(shù): 1/6頁
文件大小: 41K
代理商: CD74HCT147M
1
Data sheet acquired from Harris Semiconductor
SCHS149
Features
Buffered Inputs and Outputs
Typical Propagation Delay: 13ns at V
CC
= 5V,
C
L
= 15pF, T
A
= 25
o
C
Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55
o
C to 125
o
C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL
Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: N
IL
= 30%, N
IH
= 30% of V
CC
at V
CC
= 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
IL
= 0.8V (Max), V
IH
= 2V (Min)
- CMOS Input Compatibility, I
l
1
μ
A at V
OL
, V
OH
Description
The Harris CD74HC147and CD74HCT147 are high speed
silicon-gate CMOS devices and are pin-compatible with low
power Schottky TTL (LSTTL).
The
encoders accept data from nine active LOW inputs (l
1
to l
9
)
and provide binary representation on the four active LOW
inputs (Y0 to Y3). A priority is assigned to each input so that
when two or more inputs are simultaneously active, the input
with the highest priority is represented on the output, with
input line l
9
having the highest priority.
These devices provide the 10-line to 4-line priority encoding
function by use of the implied decimal “zero”. The “zero” is
encoded when all nine data inputs are HIGH, forcing all four
outputs HIGH.
CD74HC147
and
CD74HCT147
9-input
priority
Pinout
CD74HC147, CD74HCT147
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE (
o
C)
PACKAGE
PKG.
NO.
CD74HC147E
-55 to 125
16 Ld PDIP
E16.3
CD74HCT147E
-55 to 125
16 Ld PDIP
E16.3
CD74HC147M
-55 to 125
16 Ld SOIC
M16.15
CD74HCT147M
-55 to 125
16 Ld SOIC
M16.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Waferordieforthispartnumberisavailablewhichmeetsallelec-
trical specifications. Please contact your local sales office or
Harris customer service for ordering information.
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
I4
I5
I6
I7
I8
Y2
GND
Y1
V
CC
Y3
I3
I2
I1
I9
Y0
NC
September 1997
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
Harris Corporation 1997
CD74HC147,
CD74HCT147
High Speed CMOS Logic
10-to-4 Line Priority Encoder
File Number
1773.1
[ /Title
(CD74
HC147
,
CD74
HCT14
7)
/Sub-
ject
(High
Speed
CMOS
Logic
10-to-4
Line
Prior-
ity
Encode
r)
/Autho
r ()
/Key-
words
(High
Speed
CMOS
Logic
10-to-4
Line
Prior-
ity
Encode
r, High
Speed
CMOS
Logic
10-to-4
Line
Prior-
ity
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