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參數資料
型號: CDCD5704_07
廠商: Texas Instruments, Inc.
英文描述: Rambus XDR CLOCK GENERATOR
中文描述: Rambus公司的XDR時鐘發生器
文件頁數: 1/19頁
文件大小: 260K
代理商: CDCD5704_07
www.ti.com
FEATURES
High-Speed Clock Support: 300-MHz–667-MHz
Clock Source for XDR Memory Subsystems
and Redwood Logic Interface
Quad (Open-Drain) Differential Output Drivers
Spread-Spectrum Compatible Clock Input Can
Be Distributed to Minimize EMI
Differential or Single-Ended Reference Clock
Input of 100 MHz or 133 MHz
Serial Interface Features: Programmable
Frequency Multiplier, Select Any One to Four
Outputs and Mode of Operation
Supports Frequency Multiplication Factors of:
×
3,
×
4,
×
5,
×
6,
×
8,
×
9/2,
×
15/2,
×
15/4
All PLL Loop Filter Components Are
Integrated
Low |Cycle-to-Cycle| of 1–6 Cycle Jitter:
40 ps: 300–635 MHz
30 ps: 636–667 MHz
PLLs Are Powered Down if No Valid REF
Clock (<10 MHz) Is Detected or VDD Is Below
1.6 V
Operates From Single 2.5-V Supply (
±
0.125 V)
Packaged in TSSOP-28
Commercial Temperature Range 0
°
C to 70
°
C
1
2
3
4
5
6
7
11
8
12
9
13
10
14
28
27
26
25
24
23
22
18
21
17
20
16
19
15
VDDP
VSSP
ISET
VSS
REFCLK
REFCLKB
VDDC
EN
VSSC
ID0
SCL
ID1
SDA
BYPASS
VDD
CLK0
CLK0B
VSS
CLK1
CLK1B
VDD
VSS
VSS
CLK2
CLK3
CLK3B
CLK2B
VDD
PW PACKAGE
(TOP VIEW)
P0043-01
APPLICATIONS
XDR Memory Subsystem and Redwood Logic
Interface
DESCRIPTION
The CDCD5704 clock generator provides the necessary clock signals to support an XDR memory subsystem
and Redwood logic interface using a reference clock input with or without spread-spectrum modulation.
Contained in a 28-pin TSSOP package that includes four differential clock outputs, the CDCD5704 provides an
off-the-shelf solution for a broad range of high-performance interface applications.
CDCD5704
SCAS823–DECEMBER 2006
Rambus XDR CLOCK GENERATOR
The block diagram shows the major components of the CDCD5704, which include a phase-locked loop, a
bypass multiplexer, and four differential output buffers (CLK0 to CLK3). All four outputs can be disabled by a
logical low at the input of the EN pin. An output is enabled when EN is high and a value of 1 is in its serial
interface register (RegA–RegD).
The PLL receives a reference clock input signal, REFCLK, and outputs a clock signal at a frequency equal to the
input frequency times the multiplication factor. The PLL output clock signal is fed to the differential output buffers
to drive the enabled clocks. Disabled outputs are set to high impedance.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Rambus, XDR are trademarks of Rambus Inc.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 2006, Texas Instruments Incorporated
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相關代理商/技術參數
參數描述
CDCD5704PW 功能描述:時鐘發生器及支持產品 Rambus XDR Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
CDCD5704PWG4 功能描述:時鐘發生器及支持產品 Rambus XDR Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
CDCD5704PWR 功能描述:時鐘發生器及支持產品 Rambus XDR Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
CDCD5704PWRG4 功能描述:時鐘發生器及支持產品 Rambus XDR Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56
CDCD5714DGG 制造商:Texas Instruments 功能描述:
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