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參數資料
| 型號： | CG80C286-12 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | High Performance Microprocessor with Memory Management and Protection |
| 中文描述： | 16-BIT, 12.5 MHz, MICROPROCESSOR, CPGA68 |
| 文件頁數： | 1/13頁 |
| 文件大小： | 508K |
| 代理商： | CG80C286-12 |
128
TM
80C286/883
High Performance Microprocessor with Memory
Management and Protection
Description
The Intersil 80C286/883 is a static CMOS version of the
NMOS 80286 microprocessor. The 80C286/883 is an
advanced, high-performance microprocessor with specially
optimized capabilities for multiple user and multi-tasking sys-
tems. The 80C286/883 has built-in memory protection that
supports operating system and task isolation as well as pro-
gram and data privacy within tasks. The 80C286/883
includes memory management capabilities that map 230
(one gigabyte) of virtual address space per task into 2
24
bytes (16 megabytes) of physical memory.
The 80C286/883 is upwardly compatible with 80C86 and
80C88 software (the 80C286/883 instruction set is a super-
set of the 80C86/80C88 instruction set). Using the 80C286/
883 real address mode, the 80C286/883 is object code com-
patible with existing 80C86 and 80C88 software. In pro-
tected virtual address mode, the 80C286/883 is source code
compatible with 80C86 and 80C88 software but may require
upgrading to use virtual address as supported by the
80C286/883’s integrated memory management and protec-
tion mechanism. Both modes operate at full 80C286/883
performance and execute a superset of the 80C86 and
80C88 instructions.
The 80C286/883 provides special operations to support the
efficient implementation and execution of operating systems.
For example, one instruction can end execution of one task,
save its state, switch to a new task, load its state, and start
execution of the new task. The segment-not-present excep-
tion and restartable instructions.
Features
This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
Compatible with NMOS 80286/883
Static CMOS Design for Low Power Operation
- ICCSB = 5mA Maximum
- ICCOP = 185mA Maximum (80C286-10/883)
- ICCOP = 220mA Maximum (80C286-12/883)
Large Address Space
- 16 Megabytes Physical
- 1 Gigabyte Virtual per Task
Integrated Memory Management, Four-Level Memory
Protection and Support for Virtual Memory and
Operating Systems
Two 80C86 Upward Compatible Operating Modes
- 80C286/883 Real Address Mode
- Protected Virtual Address Mode
Compatible with 80287 Numeric Data Co-Processor
March 1997
Ordering Information
PACKAGE
TEMP. RANGE
10MHz
12.5MHz
16MHz
20MHz
25MHz
PKG. NO.
68 Pin PGA
0
o
C to +70
o
C
-
CG80C286-12
CG80C286-16
CG80C286-20
-
G68.B
-40
o
C to +85
o
C
IG80C286-10
IG80C286-12
-
-
-
G68.B
-55
o
C to +125
o
C MG80C286-10/883 MG80C286-12/883
-
-
-
G68.B
5962-9067801MXC 5962-9067802MXC
-
-
-
G68.B
FN2948.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2002. All Rights Reserved
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