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參數(shù)資料
| 型號(hào)： | CWB309CP |
| 廠商： | CALOGIC LLC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | CMOS/DMOS Quad Monolithic SPST Wide Band Analog Switches |
| 中文描述： | QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 85K |
| 代理商： | CWB309CP |
CMOS/DMOS
QuadMonoithc SPST
Wide BandAnalog Swtches
CWB308 /CWB309
FEATURES
Low Insertion Loss . . . . . . . . . . . . . 0.9 x DC @ 100MHz
Low Channel-to-Channel Crosstalk. . . . . . . . . . . . -80dB
High OFF Isolation . . . . . . . . . . . . . . . . . 68dB @ 10MHz
Fast Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . <140ns
Low ON Resistance. . . . . . . . . . . . . . . . . . . . . . 40
(typ)
APPLICATIONS
High Speed Multiplexing
RF & Video Switches
Sample and Hold Switches
Track and Hold Switches
Computer Peripherals
DESCRIPTION
The Calogic CWB308 and CWB309 feature fast switching
(<140ns) and low ON resistance (<40
) for excellent
performance in applications in communications, computer
peripherals and instrument controls. This series combines
low power CMOS input logic and level translation circuitry with
high speed, low capacitance DMOS switches in a monolithic
structure. The CWB308 and CWB309 have CMOS
compatible inputs and also have a standard pin configuration
for second sourcing.
ORDERING INFORMATION
Part
CWB308CP
CWB308CY
XCWB308
CWB309CP
CWB309CY
XCWB309
Package
Plastic 16-Pin Dip
Plastic SO-16 Surface Mount 0 to +85
o
C
Sorted Chips in Carriers
Plastic 16-Pin Dip
Plastic SO-16 Surface Mount 0 to +85
o
C
Sorted Chips in Carriers
Temperature Range
0 to +85
o
C
0 to +85
o
C
0 to +85
o
C
0 to +85
o
C
C ORPORATION
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN1
D1
S1
V-
GND
S4
D4
IN4
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN1
D1
S1
V-
GND
S4
D4
IN4
IN2
D2
S2
V+
N/C
S3
D3
IN3
IN2
D2
S2
V+
N/C
S3
D3
IN3
TOP VIEW
CWB308CP
CWB309CP
TOP VIEW
16-PIN DIP
SO-16
CWB308CY
CWB309CY
Logic
CWB308
CWB309
0
OFF
ON
1
ON
OFF
All devices contain diodes to protect inputs against damage due
to high static voltages or electric fields; however, it is advised that
precautions be taken not to exceed the maximum recommended
input voltages. All unused inputs must be connected to an
appropriate logic level (either V
cc
or GND).
LOGIC TABLE
PIN CONFIGURATION
FUNCTIONAL BLOCK DIAGRAMS
IN
IN
IN
IN
S
D
S
3
4
1
2
D
S
D
S
D
1
1
2
2
3
3
4
4
IN
IN
IN
IN
S
D
S
3
4
1
2
D
S
D
S
D
1
1
2
2
3
3
4
4
Four SPST Switches per Package.
Switches shown in Logic '1' Input Position.
CWB308
CWB309
CWB
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