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參數資料
| 型號： | CY74FCT163501SSOP |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 18-Bit Registered Transceivers |
| 中文描述： | 18位注冊收發器 |
| 文件頁數： | 1/9頁 |
| 文件大?。?/td> | 67K |
| 代理商： | CY74FCT163501SSOP |
18-Bit Registered Transceivers
CY74FCT163501
CY74FCT163H501
SCCS047 - January 1998 - Revised March 2000
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
Copyright
2000, Texas Instruments Incorporated
Features
Low power, pin-compatible replacement for LCX and
LPT families
5V tolerant inputs and outputs
24 mA balanced drive outputs
Power-off disable outputs permits live insertion
Edge-rate control circuitry for reduced noise
FCT-C speed at 4.6 ns
Latch-up performance exceeds JEDEC standard no. 17
ESD > 2000V per MIL-STD-883D, Method 3015
Typical output skew < 250ps
Industrial temperature range of –40C to +85C
TSSOP (19.6-mil pitch) or SSOP (25-mil pitch)
Typical V
olp
(ground bounce) performance exceeds Mil
Std 883D
V
CC
= 2.7V to 3.6V
CY74FCT163501 Features:
Balanced output drivers: 24 mA
Reduced system switching noise
Typical V
OLP
(ground bounce) <0.6V at V
CC
= 3.3V,
T
A
= 25C
CY74FCT163H501 Features:
Bus hold retains the last active state
Devices with bus hold are not recommended for trans-
lating rail-to-rail CMOS signals to 3.3V logic levels
Eliminates the need for external pull-up or pull-down
resistors
Functional Description
These 18-bit universal bus transceivers can be operated in
transparent, latched or clock modes by combining D-type
latches and D-type flip-flops. Data flow in each direction is
controlled by output enable (OEAB and OEBA), latch enable
(LEAB and LEBA), and clock inputs (CLKAB and CLKBA). For
A-to-B data flow, the device operates in transparent mode
when LEAB is HIGH. When LEAB is LOW, the A data is
latched if CLKAB is held at a HIGH or LOW logic level. If LEAB
is LOW, the A bus data is stored in the latch/flip-flop on the
LOW-to-HIGH transition of CLKAB. OEAB performs the output
enable function on the B port. Data flow from B-to-A is similar
to that of A-to-B and is controlled by OEBA, LEBA, and
CLKBA. The output buffers are designed with a power-off
disable feature to allow live insertion of boards.
THE CY74FCT163501 has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need for external terminating resistors, as well as provides for
minimal undershoot and reduced ground bounce. The
CY74FCT163501 is ideal for driving transmission lines.
The CY74FCT163H501 is a 24-mA balanced output part, that
has “bus hold” on the data inputs. The device retains the
input’s last state whenever the input goes to high impedance.
This eliminates the need for pull-up/down resistors and
prevents floating inputs.
GND
B
7
B
8
B
9
B
10
B
11
B
12
Functional Block Diagram; CY74FCT163501, CY74FCT163H501
Pin Configuration
SSOP/TSSOP
Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
OEAB
LEAB
A
1
GND
A
2
A
3
GND
B
13
B
14
B
15
V
CC
B
16
B
17
V
CC
A
4
A
5
A
6
GND
GND
B
18
CLKBA
GND
A
13
A
14
A
15
FCT163501-1
A
7
A
8
A
9
A
10
A
11
A
12
GND
A
18
OEBA
LEBA
V
CC
A
16
A
17
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
GND
CLKAB
B
1
GND
B
2
B
3
V
CC
B
4
B
5
B
6
GND
OEAB
CLKBA
LEBA
OEBA
CLKAB
LEAB
C
D
C
D
C
D
A
1
B
1
C
D
TO 17 OTHER CHANNELS
FCT163501-2
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| CY74FCT163543SSOP | 16-Bit Latched Transceiver |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| CY74FCT163501TSSOP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:18-Bit Registered Transceivers |
| CY74FCT163543 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-Bit Latched Transceiver |
| CY74FCT163543APVC | 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-Bit Latched Transceiver |
| CY74FCT163543APVCT | 制造商:TI 制造商全稱:Texas Instruments 功能描述:16-Bit Latched Transceiver |
| CY74FCT163543CPAC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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