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參數資料
| 型號： | CY7C106D |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 1-Mbit (256K x 4) Static RAM |
| 中文描述： | 1兆位（256K × 4）靜態RAM |
| 文件頁數： | 1/11頁 |
| 文件大小： | 834K |
| 代理商： | CY7C106D |
1-Mbit (256K x 4) Static RAM
CY7C106D
CY7C1006D
Cypress Semiconductor Corporation
Document #: 38-05459 Rev. *E
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised February 22, 2007
Features
Pin- and function-compatible with CY7C106B/CY7C1006B
High speed
— t
AA
=
10 ns
Low active power
— I
CC
= 80 mA @ 10 ns
Low CMOS standby power
— I
SB2
= 3.0 mA
2.0V Data Retention
Automatic power-down when deselected
CMOS for optimum speed/power
TTL-compatible inputs and outputs
CY7C106D available in Pb-free 28-pin 400-Mil wide Molded
SOJ package. CY7C1006D available in Pb-free 28-pin
300-Mil wide Molded SOJ package
Functional Description
[1]
The CY7C106D and CY7C1006D are high-performance
CMOS static RAMs organized as 262,144 words by 4 bits.
Easy memory expansion is provided by an active LOW Chip
Enable (CE), an active LOW Output Enable (OE), and tri-state
drivers. These devices have an automatic power-down feature
that reduces power consumption by more than 65% when the
devices are deselected. The four input and output pins (IO
0
through IO
3
) are placed in a high-impedance state when:
Deselected (CE HIGH)
Outputs are disabled (OE HIGH)
When the write operation is active (CE and WE LOW)
Write to the device by taking Chip Enable (CE) and Write
Enable (WE) inputs LOW. Data on the four IO pins (IO
0
through IO
3
) is then written into the location specified on the
address pins (A
0
through A
17
).
Read from the device by taking Chip Enable (CE) and Output
Enable (OE) LOW while forcing Write Enable (WE) HIGH.
Under these conditions, the contents of the memory location
specified by the address pins appears on the four IO pins.
Logic Block Diagram
IO0
IO1
IO2
IO3
S
POWER
DOWN
CE
WE
OE
A1
A2
A3
A4
A5
A6
A7
A8
A9
R
256K x 4
ARRAY
INPUT BUFFER
A
A
A
A
A
A
A
A
A
COLUMN DECODER
Note
1. For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at
www.cypress.com
.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| CY7C106D-10VXI | 功能描述:靜態隨機存取存儲器 1M 512K IND FAST ASYNC 靜態隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C106D-10VXIT | 功能描述:靜態隨機存取存儲器 1M 512K IND FAST ASYNC 靜態隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1071DV3312BAXI | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1071DV33-12BAXI | 功能描述:靜態隨機存取存儲器 32MB (2MX16) 3.3V 12ns 靜態隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1071DV33-12BAXIT | 功能描述:靜態隨機存取存儲器 32-Mbit (2M x 16) 靜態隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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