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參數資料
| 型號： | CY7C109B-15ZXC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 128K x 8 Static RAM |
| 中文描述： | 128K X 8 STANDARD SRAM, 15 ns, PDSO32 |
| 封裝： | 8 X 20 MM, LEAD FREE, TSOP1-32 |
| 文件頁數： | 1/10頁 |
| 文件大小： | 375K |
| 代理商： | CY7C109B-15ZXC |
128K x 8 Static RAM
Functional Description
[1]
CY7C109B
CY7C1009B
Cypress Semiconductor Corporation
Document #: 38-05038 Rev. *C
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised August 3, 2006
Features
High speed
— t
AA
= 12 ns
Low active power
— 495 mW (max.)
Low CMOS standby power
— 11 mW (max.) (L Version)
2.0V Data Retention
Automatic power-down when deselected
TTL-compatible inputs and outputs
Easy memory expansion with CE
1
, CE
2
, and OE options
CY7C109B is available in standard 400-mil-wide SOJ
and 32-pin TSOP type I packages. The CY7C1009B is
available in a 300-mil-wide SOJ package
The CY7C109B/CY7C1009B is a high-performance CMOS
static RAM organized as 131,072 words by 8 bits. Easy
memory expansion is provided by an active LOW Chip Enable
(CE
1
), an active HIGH Chip Enable (CE
2
), an active LOW
Output Enable (OE), and tri-state drivers. Writing to the device
is accomplished by taking Chip Enable One (CE
1
) and Write
Enable (WE) inputs LOW and Chip Enable Two (CE
2
) input
HIGH. Data on the eight I/O pins (I/O
0
through I/O
7
) is then
written into the location specified on the address pins (A
0
through A
16
).
Reading from the device is accomplished by taking Chip
Enable One (CE
1
) and Output Enable (OE) LOW while forcing
Write Enable (WE) and Chip Enable Two (CE
2
) HIGH. Under
these conditions, the contents of the memory location
specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O
0
through I/O
7
) are placed in a
high-impedance state when the device is deselected (CE
1
HIGH or CE
2
LOW), the outputs are disabled (OE HIGH), or
during a write operation (CE
1
LOW, CE
2
HIGH, and WE LOW).
CY7C109B is available in standard 400-mil-wide SOJ and 32-
pin TSOP type I packages. The CY7C1009B is available in a
300-mil-wide SOJ package. The CY7C109B and CY7C1009B
are functionally equivalent in all other respects
Note:
1. For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at www.cypress.com.
2. NC pins are not connected on the die.
1
A
1
A
Logic Block Diagram
Pin
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
COLUMN
DECODER
R
S
INPUT BUFFER
POWER
DOWN
WE
OE
I/O
0
CE
2
I/O
1
I/O
2
I/O
3
ARRAY
I/O
7
I/O
6
I/O
5
I/O
4
A
0
A
1
A
1
A
1
A
1
CE
1
A
1
A
9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
19
18
20
24
23
22
21
25
28
27
26
Top View
SOJ
29
32
31
30
16
17
GND
A
16
A
14
A
12
A7
A6
A5
A4
A3
A2
A1
A0
WE
A
13
A
8
A
9
A
11
V
CC
A
15
CE
2
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
NC
I/O
0
I/O
1
I/O
2
CE
1
OE
A
10
A
6
A
5
A
7
A
16
A
14
A
12
WE
CE
2
A
15
V
NC
A
4
A
13
A
8
A
9
OE
A
10
TSOP I
Top View
(not to scale)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
I/O
2
I/O
1
I/O
0
A
0
GND
I/O
7
I/O
6
I/O
4
I/O
3
I/O
5
CE
A
11
17
A
1
A
2
A
3
Configurations
[2]
128K x 8
[+] Feedback
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相關代理商/技術參數 |
參數描述 |
|---|---|
| CY7C109B-15ZXCT | 功能描述:IC SRAM 1MBIT 15NS 32TSOP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M（8Mx32） 速度:133MHz 接口:并聯 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應商設備封裝:90-VFBGA（8x13） 包裝:帶卷 (TR) 其它名稱:557-1327-2 |
| CY7C109B-1XW14 | 制造商:Cypress Semiconductor 功能描述:1MB (128K X 8)- FAST ASYNCH SRAM - Gel-pak, waffle pack, wafer, diced wafer on film |
| CY7C109B-20VC | 功能描述:IC SRAM 1MBIT 20NS 32SOJ RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:96 系列:- 格式 - 存儲器:閃存 存儲器類型:FLASH 存儲容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應商設備封裝:48-TSOP 包裝:托盤 |
| CY7C109B20VCT | 制造商:CYPRESS 功能描述:7C109 factory sealed bags |
| CY7C109B-20VCT | 制造商:CYPRESS 功能描述:7C109 factory sealed bags |
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