- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄380217 > CY7C4281 (Cypress Semiconductor Corp.) 64Kx9 Deep Sync FIFOs(64Kx9 位深同步先進(jìn)先出（FIFO）) PDF資料下載
參數(shù)資料
| 型號(hào)： | CY7C4281 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 64Kx9 Deep Sync FIFOs(64Kx9 位深同步先進(jìn)先出（FIFO）) |
| 中文描述： | 64Kx9同步FIFO的深度（64Kx9位深同步先進(jìn)先出（FIFO）的） |
| 文件頁(yè)數(shù)： | 1/15頁(yè) |
| 文件大小： | 267K |
| 代理商： | CY7C4281 |
當(dāng)前第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)
PRELIMINARY
64K/128Kx9 Deep Sync FIFOs
CY7C4281
CY7C4291
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
January 1997 - Revised November 7, 1997
Features
High-speed, low-power, first-in first-out (FIFO)
memories
64k x 9 (CY7C4281)
128k x 9 (CY7C4291)
0.5 micron CMOS for optimum speed/power
High-speed 100-MHz operation (10 ns read/write cycle
times)
Low power
—
I
CC
=40 mA
—
I
SB
= 2 mA
Fully asynchronous and simultaneous read and write
operation
Empty, Full, and programmable Almost Empty and Al-
most Full status flags
TTL compatible
Output Enable (OE
)
pin
Independent read and write enable pins
Center power and ground pins for reduced noise
Supports free-running 50% duty cycle clock inputs
Width Expansion Capability
32-pin PLCC
Pin-compatible density upgrade to CY7C42X1
family
Pin-compatible density upgrade to
IDT72201/11/21/31/41/51
Functional Description
The CY7C4281/91 are high-speed, low-power, first-in first-out
(FIFO) memories with clocked read and write interfaces. All
are 9 bits wide. The CY7C4281/91 are pin-compatible to the
CY7C42X1 Synchronous FIFO family. Programmable features
include Almost Full/Almost Empty flags. These FIFOs provide
solutions for a wide variety of data buffering needs, including
high-speed data acquisition, multiprocessor interfaces, and commu-
nications buffering.
These FIFOs have 9-bit input and output ports that are con-
trolled by separate clock and enable signals. The input port is
controlled by a free-running clock (WCLK) and two write-en-
able pins (WEN1, WEN2/LD).
When WEN1 is LOW and WEN2/LD is HIGH, data is written into the
FIFO on the rising edge of the WCLK signal. While WEN1, WEN2/LD
is held active, data is continually written into the FIFO on each WCLK
cycle. The output port is controlled in a similar manner by a free-run-
ning read clock (RCLK) and two read enable pins (REN1, REN2). In
addition, the CY7C4281/91 has an output enable pin (OE). The read
(RCLK) and write (WCLK) clocks may be tied together for single-clock
operation or the two clocks may be run independently for asynchro-
nous read/write applications. Clock frequencies up to 100 MHz are
achievable. Depth expansion is possible using one enable input
for system control, while the other enable is controlled by ex-
pansion logic to direct the flow of data.
LogicBlockDiagram
4281–1
THREE-STATE
OUTPUT REGISTER
READ
CONTROL
FLAG
LOGIC
WRITE
CONTROL
WRITE
POINTER
READ
POINTER
RESET
LOGIC
INPUT
REGISTER
FLAG
PROGRAM
REGISTER
D
0
8
RCLK
Q
0
8
WEN1
WCLK
RS
OE
Dual Port
RAMARRAY
64K x 9
128K x 9
WEN2/LD
REN1 REN2
EF
PAE
PAF
FF
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C4292-10ASC | 64K/128K x 9 Deep Sync FIFOs with Retransmit and Depth Expansion |
| CY7C4292-10ASI | 64K/128K x 9 Deep Sync FIFOs with Retransmit and Depth Expansion |
| CY7C4292-15ASC | 64K/128K x 9 Deep Sync FIFOs with Retransmit and Depth Expansion |
| CY7C4292-25ASC | 64K/128K x 9 Deep Sync FIFOs with Retransmit and Depth Expansion |
| CY7C4282-25ASC | 64K/128K x 9 Deep Sync FIFOs with Retransmit and Depth Expansion |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C4281V-10JC | 制造商:Rochester Electronics LLC 功能描述:64K X 9 LOW VOLTAGE DEEP SYNC FIFO - Bulk |
| CY7C4281V-10JXC | 功能描述:先進(jìn)先出 64K X9 LO VLTG DEEP SYNC 先進(jìn)先出 COM RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲(chǔ)容量:4 Mbit 定時(shí)類型:Synchronous 組織:256 K x 18 最大時(shí)鐘頻率:100 MHz 訪問(wèn)時(shí)間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| CY7C4281V-25JC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C4282-10ASC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 64K x 9 64-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:64K X 9 DEEP SYNC FIFO (TQFP) - Bulk |
| CY7C428-25PC | 制造商:Cypress Semiconductor 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。