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參數(shù)資料
| 型號： | DC1620A-J |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 19/38頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD DEMO 65MSPS LTC2142-14 |
| 軟件下載： | QuikEval II System |
| 設計資源： | DC1620A Design Files DC1620A Schematic |
| 標準包裝： | 1 |
| 系列： | * |
| 相關產品： | DC890B-ND - BOARD USB DATA COLLECTION |
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LTC2142-14/
LTC2141-14/LTC2140-14
26
21421014fa
Digital Output Randomizer
Interference from the A/D digital outputs is sometimes
unavoidable. Digital interference may be from capacitive or
inductive coupling or coupling through the ground plane.
Even a tiny coupling factor can cause unwanted tones
in the ADC output spectrum. By randomizing the digital
output before it is transmitted off chip, these unwanted
tones can be randomized which reduces the unwanted
tone amplitude.
The digital output is randomized by applying an exclusive-
OR logic operation between the LSB and all other data
output bits. To decode, the reverse operation is applied
– an exclusive-OR operation is applied between the LSB
and all other bits. The LSB, OF and CLKOUT outputs are
not affected. The output randomizer is enabled by serially
programming mode control register A4.
Alternate Bit Polarity
Another feature that reduces digital feedback on the circuit
board is the alternate bit polarity mode. When this mode
is enabled, all of the odd bits (D1, D3, D5, D7, D9, D11,
D13) are inverted before the output buffers. The even bits
(D0, D2, D4, D6, D8, D10, D12), OF and CLKOUT are not
affected. This can reduce digital currents in the circuit
board ground plane and reduce digital noise, particularly
for very small analog input signals.
When there is a very small signal at the input of the A/D
that is centered around mid-scale, the digital outputs toggle
between mostly 1’s and mostly 0’s. This simultaneous
switching of most of the bits will cause large currents in the
ground plane. By inverting every other bit, the alternate bit
polarity mode makes half of the bits transition high while
half of the bits transition low. This cancels current flow in
the ground plane, reducing the digital noise.
The digital output is decoded at the receiver by inverting
the odd bits (D1, D3, D5, D7, D9, D11, D13). The alter-
nate bit polarity mode is independent of the digital output
randomizer – either, both or neither function can be on at
the same time. The alternate bit polarity mode is enabled
by serially programming mode control register A4.
APPLICATIONS INFORMATION
CLKOUT
OF
D13/D0
D12/D0
D2/D0
D1/D0
D0
21421014 F15
OF
D13
D12
D2
D1
D0
RANDOMIZER
ON
D13
FPGA
PC BOARD
D12
D2
D1
D0
21421014 F16
D0
D1/D0
D2/D0
D12/D0
D13/D0
OF
CLKOUT
LTC2142
Figure 15. Functional Equivalent of Digital Output Randomizer
Figure 16. Unrandomizing a Randomized Digital
Output Signal
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