- 您現在的位置：買賣IC網 > PDF目錄376726 > DJLXT972MKEA4 (Intel Corp.) Single-Port 10/100 Mbps PHY Transceiver PDF資料下載
參數資料
| 型號： | DJLXT972MKEA4 |
| 廠商： | Intel Corp. |
| 英文描述： | Single-Port 10/100 Mbps PHY Transceiver |
| 中文描述： | 單端口10/100 Mbps的物理層收發器 |
| 文件頁數： | 64/92頁 |
| 文件大小： | 666K |
| 代理商： | DJLXT972MKEA4 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁當前第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
Intel
LXT972M Single-Port 10/100 Mbps PHY Transceiver
64
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
Table 27
lists the 100BASE-TX characteristics.
Table 28
lists the 10BASE-T characteristics.
Table 29
lists the 10BASE-T link integrity timing characteristics.
Table 27. 100BASE-TX Transceiver Characteristics
Parameter
Symbol
Min
Typ
1
Max
Units
Test Conditions
Peak differential output voltage
V
P
0.95
–
1.05
V
Note 2
Signal amplitude symmetry
Vss
98
–
102
%
Note 2
Signal rise/fall time
T
RF
3.0
–
5.0
ns
Note 2
Rise/fall time symmetry
T
RFS
–
–
0.5
ns
Note 2
Duty cycle distortion
D
CD
35
50
65
%
Offset from 16 ns pulse
width at 50% of pulse
peak
Overshoot/Undershoot
V
OS
–
–
5
%
–
Jitter (measured differentially)
–
–
–
1.4
ns
–
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
testing.
2. Measured at the line side of the transformer, line replaced by 100
Ω
(+/-1%) resistor.
Table 28. 10BASE-T Transceiver Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Test Conditions
Transmitter
Peak differential output
voltage
V
OP
2.2
2.5
2.8
V
With transformer, line
replaced by 100
Ω
resistor
Transition timing jitter added
by the MAU and PLS
sections
–
0
2
11
ns
After line model
specified by IEEE
802.3 for 10BASE-T
MAU
Receiver
Receive Input Impedance
Z
IN
–
–
22
k
Ω
–
Differential Squelch
Threshold
V
DS
300
420
585
mV
–
Table 29. 10BASE-T Link Integrity Timing Characteristics
Parameter
Symbol
Min
Typ
Max
Units
Test Conditions
Time Link Loss Receive
T
LL
50
–
150
ms
–
Link Pulse
T
LP
2
–
7
Link Pulses
–
Link Min Receive Timer
T
LR
M
IN
2
–
7
ms
–
Link Max Receive Timer
T
LR
M
AX
50
–
150
ms
–
Link Transmit Period
Tlt
8
–
24
ms
–
Link Pulse Width
Tlpw
60
–
150
ns
–
1. Typical values are at 25 °C and are for design aid only, not guaranteed, and not subject to production
testing.
相關PDF資料 |
PDF描述 |
|---|---|
| DJLXT972MLAA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MLCA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MLEA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNAA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNCA4 | Single-Port 10/100 Mbps PHY Transceiver |
相關代理商/技術參數 |
參數描述 |
|---|---|
| DJLXT972MLAA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MLC.A4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MLCA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MLEA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNAA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
發布緊急采購，3分鐘左右您將得到回復。