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參數資料
| 型號： | DJLXT972MLAA4 |
| 廠商： | Intel Corp. |
| 英文描述： | Single-Port 10/100 Mbps PHY Transceiver |
| 中文描述： | 單端口10/100 Mbps的物理層收發器 |
| 文件頁數： | 24/92頁 |
| 文件大小： | 666K |
| 代理商： | DJLXT972MLAA4 |
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Intel
LXT972M Single-Port 10/100 Mbps PHY Transceiver
24
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
5.2.1.1
Twisted-Pair Interface
The LXT972M Transceiver supports either 100BASE-TX or 10BASE-T connections over 100
Ω,
Category
5,
Unshielded Twisted Pair (UTP) cable. When operating at 100 Mbps, the LXT972M
Transceiver continuously transmits and receives MLT3 symbols. When not transmitting data, the
LXT972M Transceiver generates “IDLE” symbols.
During 10 Mbps operation, Manchester-encoded data is exchanged. When no data is being
exchanged, the line is left in an idle state. Link pulses are transmitted periodically to keep the link
up.
Only a transformer, RJ-45 connector, load resistor, and bypass capacitors are required to complete
this interface. On the transmit side, the LXT972M Transceiver has an active internal termination
and does not require external termination resistors. Intel's patented waveshaping technology shapes
the outgoing signal to help reduce the need for external EMI filters. Four slew rate settings allow
the designer to match the output waveform to the magnetic characteristics. On the receive side, the
internal impedance is high enough that it has no practical effect on the external termination circuit.
(For the slew rate settings, see
Table 56, “Transmit Control Register - Address 30, Hex 1E” on
page 89
.)
Note:
On the LXT972M Transceiver, MDIX crossover (MDIX) is supported by board design.
5.2.1.2
Remote Fault Detection and Reporting
The LXT972M Transceiver supports the remote fault detection and reporting mechanisms.
“Remote Fault” refers to a MAC-to-MAC communication function that is transparent to PHY layer
devices. It is used only during auto-negotiation, and is applicable only to twisted-pair links.
Remote Fault Detection.
Register bit 4.13 in the Auto-Negotiation Advertisement Register is
reserved for Remote Fault indications. It is typically used when re-starting the auto-negotiation
sequence to indicate to the link partner that the link is down because the advertising device
detected a local fault.
When the LXT972M Transceiver receives a Remote Fault indication from its partner during auto-
negotiation, the following occurs:
Register bit 5.13 in the Link Partner Base Page Ability Register is set.
Remote Fault Register bit 1.4 in the MII Status Register is set to pass this information to the
local controller.
相關PDF資料 |
PDF描述 |
|---|---|
| DJLXT972MLCA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MLEA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNAA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNCA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNEA4 | Single-Port 10/100 Mbps PHY Transceiver |
相關代理商/技術參數 |
參數描述 |
|---|---|
| DJLXT972MLC.A4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MLCA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MLEA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNAA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MNCA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
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