- 您現在的位置：買賣IC網 > PDF目錄376727 > DJLXT972MPEA4 (Intel Corp.) Single-Port 10/100 Mbps PHY Transceiver PDF資料下載
參數資料
| 型號： | DJLXT972MPEA4 |
| 廠商： | Intel Corp. |
| 英文描述： | Single-Port 10/100 Mbps PHY Transceiver |
| 中文描述： | 單端口10/100 Mbps的物理層收發器 |
| 文件頁數： | 82/92頁 |
| 文件大?。?/td> | 666K |
| 代理商： | DJLXT972MPEA4 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁當前第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁
Intel
LXT972M Single-Port 10/100 Mbps PHY Transceiver
82
Datasheet
Document Number: 302875-005
Revision Date: 27-Oct-2005
Table 48
lists auto-negotiation next page transmit bits.
Table 49
lists auto-negotiation link partner next page receive bits.
Table 48. Auto-Negotiation Next Page Transmit Register - Address 7, Hex 7
Bit
Name
Description
Type
1
Default
7.15
Next Page (NP)
0 = Last page
1 = Additional next pages follow
R/W
0
7.14
Reserved
Ignore when read.
RO
0
7.13
Message Page
(MP)
0 = Register bits 7.10:0 are user defined.
1 = Register bits 7.10.0 follow IEEE message page
format.
R/W
1
7.12
Acknowledge 2
(ACK2)
0 = Cannot comply with message
1 = Complies with message
R/W
0
7.11
Toggle (T)
0 = Previous value of the transmitted Link Code Word
equalled logic one
1 = Previous value of the transmitted Link Code Word
equalled logic zero
R/W
0
7.10:0
Message/
Unformatted
Code Field
If Register bits 7.13 = 0, Register bits 7.10:0 are user-
defined.
If Register bits 7.13 = 1, Register bits 7.10:0 follow
IEEE message page format.
R/W
00000000
001
1. RO = Read Only. R/W = Read/Write
Table 49. Auto-Negotiation Link Partner Next Page Receive Register - Address 8, Hex 8
Bit
Name
Description
Type
1
Default
8.15
Next Page (NP)
0 = Link Partner has no additional next pages to
send
1 = Link Partner has additional next pages to send
RO
0
8.14
Acknowledge (ACK)
0 = Link Partner has not received Link Code Word
from LXT972M Transceiver.
1 = Link Partner has received Link Code Word from
LXT972M Transceiver.
RO
0
8.13
Message Page (MP)
0 = Register bits 8.10:0 are user defined.
1 = Register bits 8.10:0 follow IEEE message page
format.
RO
0
8.12
Acknowledge 2
(ACK2)
0 = Link Partner cannot comply with the message
1 = Link Partner complies with the message
RO
0
8.11
Toggle (T)
0 = Previous value of transmitted Link Code Word
equal to logic one
1 = Previous value of transmitted Link Code Word
equal to logic zero
RO
0
8.10:0
Message/Unformatted
Code Field
If Register bit 8.13 = 0, Register bits 18.10:0 are
user defined.
If Register bit 8.13 = 1, Register bits 18.10:0 follow
IEEE message page format.
RO
000000
0000
1. RO = Read Only.
相關PDF資料 |
PDF描述 |
|---|---|
| DJLXT972MQAA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MQCA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MQEA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MTAA4 | Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MTCA4 | Single-Port 10/100 Mbps PHY Transceiver |
相關代理商/技術參數 |
參數描述 |
|---|---|
| DJLXT972MQAA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MQCA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MQEA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MTAA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
| DJLXT972MTCA4 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Single-Port 10/100 Mbps PHY Transceiver |
發布緊急采購，3分鐘左右您將得到回復。