- 您現在的位置：買賣IC網 > PDF目錄376836 > DP8441 PDF資料下載
參數資料
| 型號： | DP8441 |
| 文件頁數： | 1/46頁 |
| 文件大小： | 644K |
| 代理商： | DP8441 |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁
TL/F/11718
D
D
February 1995
DP8440-40/DP8440-25/DP8441-40/DP8441-25
microCMOS Programmable 16/64 Mbit
Dynamic RAM Controller/Driver
General Description
The DP8440/41 Dynamic RAM Controllers provide an easy
interface between dynamic RAM arrays and 8-, 16-, 32- and
64-bit microprocessors. The DP8440/41 DRAM Controllers
generate all necessary control and timing signals to suc-
cessfully interface and design dynamic memory systems.
With significant enhancements over the DP8420/21/22
predecessors, the DP8440/41 are suitable for high perform-
ance memory systems. These controllers support page and
burst accesses for fast page, static column and nibble
DRAMs. Refreshes and accesses are arbitrated on chip.
RAS low time during refresh and RAS precharge time are
guaranteed by these controllers. Separate precharge coun-
ters for each RAS output avoid delayed back to back ac-
cesses due to precharge when using memory interleaving.
Programmable features make the DP8440/41 DRAM Con-
trollers flexible enough to fit many memory systems.
Features
Y
40 MHz and 25 MHz operation
Y
Page detection
Y
Automatic CPU burst accesses
Y
Support 1/4/16/64 Mbits DRAMs
Y
High capacitance drivers for RAS, CAS, WE and Q out-
puts
Y
Support for fast page, static column and nibble mode
DRAMs
Y
High precision PLL based delay line
Y
Byte enable for word size up to 32 bits on the DP8440
or 64 bits on the DP8441
Y
Automatic Internal Refresh
Y
Staggered RAS-Only refresh
Y
Burst and CAS-before-RAS refresh
Y
Error scrubbing during refresh
Y
TRI-STATE
é
outputs
Y
Easy interface to all major microprocessors
Block Diagram
TL/F/11718–1
FIGURE 1
TRI-STATE
é
is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M75/Printed in U. S. A.
相關PDF資料 |
PDF描述 |
|---|---|
| DP84412J | DRAM Controller |
| DP84412N | DRAM Controller |
| DP8441VLJ | DRAM Controller |
| DP84422BN | DRAM Controller |
| DP84422J | DRAM Controller |
相關代理商/技術參數 |
參數描述 |
|---|---|
| DP84412J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM Controller |
| DP84412J/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM Controller |
| DP84412N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM Controller |
| DP84412N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM Controller |
| DP84412N/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DRAM Controller |
發布緊急采購，3分鐘左右您將得到回復。