- 您現在的位置：買賣IC網 > PDF目錄18702 > EFM32-TG230F32-SK (Energy Micro)IC MICRO KIT GECKO 64QFN PDF資料下載
參數資料
| 型號： | EFM32-TG230F32-SK |
| 廠商： | Energy Micro |
| 文件頁數： | 46/136頁 |
| 文件大小： | 0K |
| 描述： | IC MICRO KIT GECKO 64QFN |
| 標準包裝： | 1 |
| 系列： | Tiny Gecko |
| 套件類型： | 微控制器 |
| 值： | 2 件 - 閃存 - 32KB |
| 包裝： | 紙板盒 |
| 安裝類型： | 表面貼裝 |
| 包括封裝： | 64-QFN |
| 工具箱內容： | (2) 914-1035-2-ND - MCU 32BIT 32KB FLASH 64-QFN |
| 其它名稱： | 914-1024 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁當前第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁
...the world's most energy friendly microcontrollers
2011-02-04 - d0002_Rev1.00
17
www.energymicro.com
Address
range
Memory region
Memory
type
XN
Description
0x60000000
-
0x9FFFFFFF
External RAM
Normal
1
-
Executable region for data.
0xA0000000
-
0xDFFFFFFF
External device
Device
1
XN
1
External Device memory
0xE0000000
-
0xE00FFFFF
Private
Peripheral Bus
Strongly-
ordered
1
XN
1
This region includes the NVIC, System timer, and system control
block.
0xE0100000
-
0xFFFFFFFF
Reserved
Device
1
XN
1
Reserved
1See Section 2.2.1 (p. 15) for more information.
The Code, SRAM, and external RAM regions can hold programs. However, ARM recommends that
programs always use the Code region. This is because the processor has separate buses that enable
instruction fetches and data accesses to occur simultaneously.
The MPU can override the default memory access behavior described in this section. For more
information, see Section 4.5 (p. 113) .
2.2.4 Software ordering of memory accesses
The order of instructions in the program flow does not always guarantee the order of the corresponding
memory transactions. This is because:
the processor can reorder some memory accesses to improve efficiency, providing this does not affect
the behavior of the instruction sequence.
the processor has multiple bus interfaces
memory or devices in the memory map have different wait states
some memory accesses are buffered or speculative.
Section 2.2.2 (p. 16) describes the cases where the memory system guarantees the order of memory
accesses. Otherwise, if the order of memory accesses is critical, software must include memory barrier
instructions to force that ordering. The processor provides the following memory barrier instructions:
DMB
The
Data
Memory
Barrier
(DMB)
instruction
ensures
that
outstanding memory transactions complete before subsequent
memory transactions. See Section 3.10.3 (p. 81) .
DSB
The Data Synchronization Barrier (DSB) instruction ensures that
outstanding memory transactions complete before subsequent
instructions execute. See Section 3.10.4 (p. 82) .
ISB
The Instruction Synchronization Barrier (ISB) ensures that the effect
of all completed memory transactions is recognizable by subsequent
instructions. See Section 3.10.5 (p. 82) .
Use memory barrier instructions in, for example:
MPU programming:
Use a DSB instruction to ensure the effect of the MPU takes place immediately at the end of context
switching.
Use an ISB instruction to ensure the new MPU setting takes effect immediately after programming
the MPU region or regions, if the MPU configuration code was accessed using a branch or call.
If the MPU configuration code is entered using exception mechanisms, then an ISB instruction is
not required.
Vector table. If the program changes an entry in the vector table, and then enables the corresponding
exception, use a DMB instruction between the operations. This ensures that if the exception is taken
immediately after being enabled the processor uses the new exception vector.
相關PDF資料 |
PDF描述 |
|---|---|
| EFM32-TG210F32-SK | IC MICRO KIT GECKO 32QFN |
| 1267 X 6" | TAPE ALUMINUM FOIL 6" X 1FT |
| 7810 0.25MM | ECAP COND PAD .25MM 7.7" X 10" |
| 7810 0.20MM | ECAP COND PAD .20MM 7.7" X 10" |
| 1170 X 6" | TAPE FOIL .002" 6" X 18YDS |
相關代理商/技術參數 |
參數描述 |
|---|---|
| EFM32TG230F32-T | 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 32KB FLASH 64QFN |
| EFM32TG230F8 | 功能描述:ARM微控制器 - MCU 16KB Flash 4KB RAM RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數據總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數據 RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT |
| EFM32TG230F8-QFN64 | 制造商:Energy Micro AS 功能描述:8 FLASH, USART + UART 2, QFN64 - Tape and Reel 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 8KB FLASH 64QFN |
| EFM32TG230F8-QFN64T | 制造商:Energy Micro AS 功能描述:32 BIT ARM MPU, TINY GECKO - Trays |
| EFM32TG230F8-QFN64-T | 制造商:Energy Micro AS 功能描述:IC MCU 32BIT 8KB FLASH 64QFN |
發布緊急采購，3分鐘左右您將得到回復。