欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: EP4CGX150DF27C7N
廠商: Altera
文件頁數: 39/42頁
文件大小: 0K
描述: IC CYCLONE IV FPGA 150K 672FBGA
產品培訓模塊: Designing an IP Surveillance Camera
Three Reasons to Use FPGA's in Industrial Designs
Cyclone IV FPGA Family Overview
特色產品: Cyclone? IV FPGAs
標準包裝: 40
系列: CYCLONE® IV GX
LAB/CLB數: 9360
邏輯元件/單元數: 149760
RAM 位總計: 6635520
輸入/輸出數: 393
電源電壓: 1.16 V ~ 1.24 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 672-BBGA
供應商設備封裝: 672-BGA(27x27)
其它名稱: 544-2671
1–6
Chapter 1: Cyclone IV Device Datasheet
Operating Conditions
December 2013
Altera Corporation
ESD Performance
This section lists the electrostatic discharge (ESD) voltages using the human body
model (HBM) and charged device model (CDM) for Cyclone IV devices general
purpose I/Os (GPIOs) and high-speed serial interface (HSSI) I/Os. Table 1–5 lists the
ESD for Cyclone IV devices GPIOs and HSSI I/Os.
VCCH_GXB
Transceiver output buffer power supply
2.375
2.5
2.625
V
VCCA_GXB
Transceiver PMA and auxiliary power
supply
2.375
2.5
2.625
V
VCCL_GXB
Transceiver PMA and auxiliary power
supply
1.16
1.2
1.24
V
VI
DC input voltage
–0.5
3.6
V
VO
DC output voltage
0
VCCIO
V
TJ
Operating junction temperature
For commercial use
0
85
°C
For industrial use
–40
100
°C
tRAMP
Power supply ramp time
Standard power
-on reset
(POR) (7)
50 s
50 ms
Fast POR (8)
50 s
3 ms
IDiode
Magnitude of DC current across
PCI-clamp diode when enabled
——10
mA
Notes to Table 1–4:
(1) All VCCA pins must be powered to 2.5 V (even when PLLs are not used) and must be powered up and powered down at the same time.
(2) You must connect VCCD_PLL to VCCINT through a decoupling capacitor and ferrite bead.
(3) Power supplies must rise monotonically.
(4) VCCIO for all I/O banks must be powered up during device operation. Configurations pins are powered up by VCCIO of I/O Banks 3, 8, and 9 where
I/O Banks 3 and 9 only support VCCIO of 1.5, 1.8, 2.5, 3.0, and 3.3 V. For fast passive parallel (FPP) configuration mode, the VCCIO level of I/O
Bank 8 must be powered up to 1.5, 1.8, 2.5, 3.0, and 3.3 V.
(5) You must set VCC_CLKIN to 2.5 V if you use CLKIN as a high-speed serial interface (HSSI) refclk or as a DIFFCLK input.
(6) The CLKIN pins in I/O Banks 3B and 8B can support single-ended I/O standard when the pins are used to clock left PLLs in non-transceiver
applications.
(7) The POR time for Standard POR ranges between 50 and 200 ms. VCCINT, VCCA, and VCCIO of I/O Banks 3, 8, and 9 must reach the recommended
operating range within 50 ms.
(8) The POR time for Fast POR ranges between 3 and 9 ms. VCCINT, VCCA, and VCCIO of I/O Banks 3, 8, and 9 must reach the recommended operating
range within 3 ms.
Table 1–4. Recommended Operating Conditions for Cyclone IV GX Devices (Part 2 of 2)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Table 1–5. ESD for Cyclone IV Devices GPIOs and HSSI I/Os
Symbol
Parameter
Passing Voltage
Unit
VESDHBM
ESD voltage using the HBM (GPIOs) (1)
± 2000
V
ESD using the HBM (HSSI I/Os) (2)
± 1000
V
VESDCDM
ESD using the CDM (GPIOs)
± 500
V
ESD using the CDM (HSSI I/Os) (2)
± 250
V
Notes to Table 1–5:
(1) The passing voltage for EP4CGX15 and EP4CGX30 row I/Os is ±1000V.
(2) This value is applicable only to Cyclone IV GX devices.
相關PDF資料
PDF描述
RSO-4812S/H2 CONV DC/DC 1W 36-72VIN 12VOUT
DS18B20/T&R IC THERM MICROLAN PROG-RES TO-92
EP4CE115F23C8LN IC CYCLONE IV FPGA 115K 484FBGA
D37S33E4GX00LF CONN DSUB RCPT 37POS T/H RA GOLD
TACR226K006R CAP TANT 22UF 6.3V 10% 0805
相關代理商/技術參數
參數描述
EP4CGX150DF27C8 功能描述:FPGA - 現場可編程門陣列 FPGA - Cyclone IV GX 9360 LABs 393 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4CGX150DF27C8N 功能描述:FPGA - 現場可編程門陣列 FPGA - Cyclone IV GX 9360 LABs 393 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4CGX150DF27I7 功能描述:FPGA - 現場可編程門陣列 FPGA - Cyclone IV GX 9360 LABs 393 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4CGX150DF27I7N 功能描述:FPGA - 現場可編程門陣列 FPGA - Cyclone IV GX 9360 LABs 393 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4CGX150DF31C7 功能描述:FPGA - 現場可編程門陣列 FPGA - Cyclone IV GX 9360 LABs 475 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
主站蜘蛛池模板: 松潘县| 嵊泗县| 通化市| 乌什县| 青海省| 安图县| 安乡县| 武隆县| 金坛市| 肥西县| 涡阳县| 武清区| 霍山县| 秦安县| 朔州市| 柘荣县| 于都县| 灵山县| 肃宁县| 泽州县| 乌兰察布市| 句容市| 德清县| 兰溪市| 昌邑市| 高碑店市| 巩留县| 资溪县| 义马市| 东乌| 大同市| 上犹县| 宝清县| 安化县| 仪征市| 河津市| 公安县| 太谷县| 休宁县| 扎囊县| 保德县|