
FAN5070
2
REV. 1.0.1 8/7/01
Pin Assignments
20
19
18
17
16
15
14
13
12
11
FAN5070
HIDRV
SW
GNDA
VID4
VID3
VID2
VID1
VID0
VREF
NC
VCCP
LODRV
GNDP
VCCA
VFB
DROOP
ILIM
PWRGD
SS/ENABLE
NC
1
2
3
4
5
6
7
8
9
10
Pin Definitions
Pin Number
1
Pin Name
HIDRV
Pin Function Description
High Side FET Driver.
Connect this pin to the gate of an N-channel MOSFET. The
trace from this pin to the MOSFET gate should be <0.5".
High Side Driver Source and Low Side Driver Drain Switching Node.
Together
with DROOP and ILIM pins allows FET sensing for V
CC
current.
Analog Ground.
Return path for low power analog circuitry. This pin should be
connected to a low impedance system ground plane to minimize ground loops.
Voltage Identification Code Inputs.
These open collector/TTL compatible inputs
will program the output voltage over the ranges specified in Table 1.
DAC Output for Test Only.
Do not load externally.
NC.
No Connect.
Output Enable.
A logic LOW on this pin will disable all outputs. An internal current
source allows for open collector control. This pin also doubles as soft start for all
outputs.
Power Good Flag.
An open collector output that will be logic LOW if any output
voltage is not within ±14% of the nominal output voltage setpoint.
V
CC
Current Feedback.
Pin 11 is used in conjunction with pin 2 as the input for the
V
CC
current feedback control loop. Layout of these traces is critical to system
performance. See Application Information for details.
Droop Set.
Use this pin to set magnitude of active droop.
Vcc Voltage Feedback.
Pin 13 is used as the input for the V
CC
voltage feedback
control loop. See Application Information for details regarding correct layout.
Analog V
CC
.
Connect to system 5V supply and decouple with a 0.1μF ceramic
capacitor.
Power Ground.
Return pin for high currents flowing in pin 17 (V
CCP
).
V
CC
Low Side FET Driver.
Connect this pin to the gate of an N-channel MOSFET
for synchronous operation. The trace from this pin to the MOSFET gate should be
<0.5".
Power V
CC
.
For all FET drivers. Connect to system 12V supply through a 33
, and
decouple with a 1μF ceramic capacitor.
2
SW
3
GNDA
4-8
VID4-0
9
VREF
NC
10, 11
12
ENABLE/SS
13
PWRGD
14
ILIM
15
16
DROOP
VFB
17
VCCA
18
19
GNDP
LODRV
20
VCCP