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參數資料
| 型號： | FAN5093 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | Two Phase Interleaved Synchronous Buck Converter for VRM 9.x Applications |
| 中文描述： | 兩相交錯同步降壓轉換器的電源模組采用9.x中的應用 |
| 文件頁數： | 13/17頁 |
| 文件大小： | 578K |
| 代理商： | FAN5093 |
PRODUCT SPECIFICATION
FAN5093
REV. 1.1.0 3/27/03
13
the VFB pin exceeds 2.2V, an over-voltage condition is
assumed and the FAN5093 latches on the external low-side
MOSFET and latches off the high-side MOSFET. The
DC-DC converter returns to normal operation only after V
CC
has been recycled.
Over Temperature Protection
If the FAN5093 die temperature exceeds approximately
150
°
C, the IC shuts itself off. It remains off until the temper-
ature has dropped approximately 25
°
C, at which time it
resumes normal operation.
Component Selection
MOSFET Selection
This application requires N-channel Enhancement Mode Field
Effect Transistors. Desired characteristics are as follows:
Low Drain-Source On-Resistance,
R
DS,ON
< 10m
(lower is better);
Power package with low Thermal Resistance;
Drain-Source voltage rating > 15V;
Low gate charge, especially for higher frequency
operation.
For the low-side MOSFET, the on-resistance (R
DS,ON
) is the
primary parameter for selection. Because of the small duty
cycle of the high-side, the on-resistance determines the
power dissipation in the low-side MOSFET and therefore
significantly affects the efficiency of the DC-DC converter.
For high current applications, it may be necessary to use two
MOSFETs in parallel for the low-side for each phase.
For the high-side MOSFET, the gate charge is as important
as the on-resistance, especially with a 12V input and with
higher switching frequencies. This is because the speed of
the transition greatly affects the power dissipation. It may be
a good trade-off to select a MOSFET with a somewhat
higher R
DS,on
, if by so doing a much smaller gate charge is
available. For high current applications, it may be necessary
to use two MOSFETs in parallel for the high-side for each
phase.
At the FAN5093’s highest operating frequencies, it may be
necessary to limit the total gate charge of both the high-side
and low-side MOSFETs together, to avert excess power dis-
sipation in the IC.
For details and a spreadsheet on MOSFET selection, refer to
Applications Bulletin AB-8.
Gate Resistors
Use of a gate resistor on every MOSFET is mandatory. The
gate resistor prevents high-frequency oscillations caused by
the trace inductance ringing with the MOSFET gate
capacitance. The gate resistors should be located physically
as close to the MOSFET gate as possible.
The gate resistor also limits the power dissipation inside the
IC, which could otherwise be a limiting factor on the switch-
ing frequency. It may thus carry significant power, especially
at higher frequencies. As an example: The FDB7045L has a
maximum gate charge of 70nC at 5V, and an input capaci-
tance of 5.4nF. The total energy used in powering the gate
during one cycle is the energy needed to get it up to 5V, plus
the energy to get it up to 12V:
This power is dissipated every cycle, and is divided between
the internal resistance of the FAN5093 gate driver and the
gate resistor. Thus,
and each gate resistor thus requires a 1/4W resistor to ensure
worst case power dissipation.
Inductor Selection
Choosing the value of the inductor is a tradeoff between
allowable ripple voltage and required transient response.
A smaller inductor produces greater ripple while producing
better transient response. In any case, the minimum induc-
tance is determined by the allowable ripple. The first order
equation (close approximation) for minimum inductance for
a two-phase converter is:
where:
Vin = Input Power Supply
Vout = Output Voltage
f = DC/DC converter switching frequency
ESR = Equivalent series resistance of all output capacitors in
parallel
Vripple = Maximum peak to peak output ripple voltage
budget.
Schottky Diode Selection
The application circuit of Figure 2 shows a Schottky diode,
D1 (D2 respectively), one in each phase. They are used as
free-wheeling diodes to ensure that the body-diodes in the
low-side MOSFETs do not conduct when the upper
MOSFET is turning off and the lower MOSFETs are turning
on. It is undesirable for this diode to conduct because its high
forward voltage drop and long reverse recovery time
degrades efficiency, and so the Schottky provides a shunt
path for the current. Since this time duration is extremely
short, being minimized by the adaptive gate delay, the
selection criterion for the diode is that the forward voltage of
E
QV
1
2
--
C
+
V2
70nC
5V
1
2
--
+
5.4nF
12V
5V
–
(
)
2
=
=
482nJ
=
P
Rgate
E
f
R
R
internal
R
gate
4.7
+
(
)
------------------------------------------------
482nJ
300KHz
=
=
0.5
+
--------------------------------
131mW
=
L
min
V
----------------------------------
2
V
–
f
V
V
in
-----------
V
ripple
-----------------
=
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