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www.fairchildsemi.com
FAN5182 Rev. 1.0.1
F
Close Loop Compensation Design
Optimum compensation of the FAN5182 assures the best possi-
ble load regulation and transient response of the regulator. The
target of the compensation design is to achieve reasonably high
control bandwidth with sufficient phase and gain margin.
The power stage of the synchronous buck converter consists of
two poles and one zero. A two-pole, one-zero compensator of
the voltage error amplifier is adequate for proper compensation,
if the output bulk capacitors are electrolytic types (low ESR
zero). Equations 17 to 19 are able to yield an approximate start-
ing point for the design. To further optimize the design, some
bench adjustments may be necessary
(17)
(18)
(19)
If C
X
is 6000μF (five 1200μF capacitors in parallel) with an
equivalent ESR of 3m
, the equations above give the following
compensation values:
C
A
= 1.33nF
R
A
= 6.05k
C
FB
= 110pF
Selecting the nearest standard value for each of these compo-
nent yields C
A
= 1.2nF, R
A
= 6.04k
, and C
FB
= 100pF.
As mentioned above, this compensation design scheme is typi-
cally good for applications using electrolytic type capacitors,
where the capacitor ESR zero can roughly cancel one of the
power stage poles. However, for all ceramic capacitor types of
applications, since the capacitor ESR zero can be very high, a
three-pole, two-zero compensator has to be used.
A complete Mathcad control design program is available from
Fairchild upon request.
Input Capacitor Selection and Input Current di/dt
Reduction
In continuous inductor current mode, the source current of the
high-side MOSFET is approximately a square wave with a duty
ratio equal to n
×
V
OUT
/V
IN
and an amplitude of one-nth the
maximum output current. To prevent large voltage variation, a
low ESR input capacitor, sized for the maximum rms current,
must be used. The maximum rms capacitor current is given by
(20)
Note that manufacturers often specify capacitor ripple current
rating based on only 2,000 hours of life. Therefore, it is advis-
able to further derate the capacitor or to choose a capacitor
rated at a higher temperature than required. Several capacitors
may be placed in parallel to meet size or height requirements in
the design. In this example, the input capacitor bank is formed
by two 2,700μF, 16V aluminum electrolytic capacitors and three
4.7μF ceramic capacitors.
To reduce the input current di/dt to a level below the system
requirement, in this example 0.1A/μs, an additional small induc-
tor (L > 370nH @ 10A) can be inserted between the converter
and the supply bus. This inductor serves as a filter between the
converter and the primary power source.
Inductor DCR Temperature Correction
With the inductor's DCR being used as the sense element, one
needs to compensate for temperature changes in the inductor's
winding if a highly accurate current limit setpoint is desired. For-
tunately, copper has a well-known temperature coefficient (TC)
of 0.39%/°C.
If R
CS
is designed to have an opposite and equal percentage of
change in resistance to that of the inductor wire, it cancels the
temperature variation of the inductor's DCR. Due to the nonlin-
ear nature of NTC thermistors, resistors R
CS1
and R
CS2
are
needed. See Figure 9. for instructions on how to linearize the
NTC and produce the desired temperature coefficient.
Figure 9. Temperature Compensation
Circuit Values
Follow the procedures and expressions shown below for calcu-
lation of R
CS1
, R
CS2
, and R
TH
(the thermistor value at 25°C)
based on a given R
CS
value.
1. Select an NTC according to type and value. Because we do
not have a value yet, start with a thermistor with a value close
to R
CS
. The NTC should also have an initial tolerance of bet-
ter than 5%.
2. Based on the NTC type, find its relative resistance value at
two temperatures. The temperatures that work well are 50°C
and 90°C. These resistance values are called A (R
TH(50°C)
/
R
TH(25°C)
) and B (R
TH(90°C)
/R
TH(25°C)
). Note that the NTC's
relative value is always 1 at 25°C.
3. Find the relative value of R
CS
required for each of these tem-
peratures. This is based on the percentage of change
needed, which in this example is initially 0.39%/°C. These are
called r1 (1/(1 + TC
×
(T
1
- 25))) and r2 (1/(1 + TC
×
(T
2
-
25))), where TC = 0.0039 for copper. T
1
= 50°C and T
2
=
90°C are chosen. From this, one can calculate that r1 =
0.9112 and r2 = 0.7978.
C
A
C
4
X
R
B2
------------R
n
R
×
V
OUT
-------------
R
L
×
A
D
R
DS
×
(
)
+
-------------------------------------------------------------------
×
=
R
A
4
R
C
x
n
R
x
---------------------------
L
V
V
OUT
R
x
-------------------------
A
R
×
2
f
SW
R
x
-----------------------------
–
×
=
C
FB
f
SW
2
n
R
A
×
-----------------1
=
I
CRMS
D
I
O
×
n
D
----1
1
–
×
×
=
I
CRMS
0.15
55A
0.15
3
-------1
1
–
×
×
9.1A
=
=
12
FAN5182
CSCOMP
CSSUM
CSREF
R
TH
R
CS1
R
CS2
C
CS1
C
CS2
R
PH1
R
PH2
R
PH3
TO
SWITCH
NODES
TO
V
OUT
SENSE
PLACE AS CLOSE AS POSSIBLE
TO NEAREST INDUCTOR
OR LOW-SIDE MOSFET
KEEP THIS PATH
AS SHORT AS POSSIBLE
AND WELL AWAY FROM
SWITCH NODE LINES
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