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參數資料
| 型號： | FAN5236QSCX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩壓器 |
| 英文描述： | Dual Mobile-Friendly DDR / Dual-output PWM Controller |
| 中文描述： | DUAL SWITCHING CONTROLLER, 345 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封裝： | QSOP-28 |
| 文件頁數： | 16/20頁 |
| 文件大小： | 199K |
| 代理商： | FAN5236QSCX |
PRODUCT SPECIFICATION
FAN5236
16
REV. 1.1.7 4/4/03
These losses are given by:
P
UPPER
= P
SW
+ P
COND
P
UPPER
is the upper MOSFET’s total losses, and P
SW
and
P
COND
are the switching and conduction losses for a given
MOSFET. R
DS(ON)
is at the maximum junction temperature
(T
J
). t
S
is the switching period (rise or fall time) and is t2+t3
Figure 15.
The driver’s impedance and C
ISS
determine t2 while t3’s
period is controlled by the driver’s impedance and Q
GD
.
Since most of t
S
occurs when V
GS
= V
SP
we can use a
constant current assumption for the driver to simplify the
calculation of t
S
:
Figure 16. Switching losses and Q
G
Figure 17. Drive Equivalent Circuit
Most MOSFET vendors specify Q
GD
and Q
GS
. Q
G(SW)
can
be determined as: Q
G(SW)
= Q
GD
+ Q
GS
– Q
TH
where Q
TH
is
the the gate charge required to get the MOSFET to it’s
threshold (V
TH
). For the high-side MOSFET, V
DS
= VIN,
which can be as high as 20V in a typical portable applica-
tion. Care should also be taken to include the delivery of the
MOSFET’s gate power (P
GATE
)
in calculating the power
dissipation required for the FAN5236:
P
GATE
= Q
G
×
VCC
×
F
SW
(21)
where Q
G
is the total gate charge to reach VCC.
Low-Side Losses
Q2, however, switches on or off with its parallel shottky
diode conducting, therefore V
DS
≈
0.5V. Since P
SW
is
proportional to V
DS
, Q2’s switching losses are negligible
and we can select Q2 based on R
DS(ON)
only.
Conduction losses for Q2 are given by:
where R
DS(ON)
is the R
DS(ON)
of the MOSFET at the highest
operating junction temperature and
is the minimum duty cycle for the converter.
Since D
MIN
< 20% for portable computers, (1-D)
≈
1
produces a conservative result, further simplifying the
calculation.
The maximum power dissipation (P
D(MAX)
) is a function of
the maximum allowable die temperature of the low-side
MOSFET, the
θ
J-A
, and the maximum allowable ambient
temperature rise:
θ
J-A
, depends primarily on the amount of PCB area that can
be devoted to heat sinking (see FSC app note AN-1029 for
SO-8 MOSFET thermal information).
P
SW
V
--------2
I
L
×
2
×
t
S
×
F
SW
=
(19a)
P
COND
V
V
IN
--------------
I
OUT
2
×
R
DS ON
)
×
=
(19b)
V
SP
V
TH
t1
t2
t3
4.5V
t4
t5
Q
G(SW)
V
DS
I
D
Q
GS
Q
GD
V
GS
C
ISS
C
RSS
C
ISS
C
ISS
= C
GS
|| C
GD
C
GD
R
D
R
GATE
C
GS
HDRV
5V
SW
VIN
G
t
S
Q
DRIVER
)
I
Q
DRIVER
)
V
SP
R
GATE
+
–
R
------------VCC
≈
=
(20)
P
COND
1
D
–
(
)
I
OUT
2
×
R
DS ON
)
×
=
(22)
D
V
IN
-V
=
P
D MAX
)
T
-------------------------------------------------
T
)
–
J
A
–
=
(23)
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