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參數資料
| 型號： | FDZ7296 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | JFETs |
| 英文描述： | 30V N-Channel PowerTrench BGA MOSFET |
| 中文描述： | 11 A, 30 V, 0.0085 ohm, N-CHANNEL, Si, POWER, MOSFET |
| 封裝： | ULTRA THIN, BGA-18 |
| 文件頁數： | 2/6頁 |
| 文件大小： | 218K |
| 代理商： | FDZ7296 |
FDZ7296 Rev B(W)
Electrical Characteristics
Symbol
T
A
= 25°C unless otherwise noted
Test Conditions
Parameter
Min Typ Max Units
Off Characteristics
BV
DSS
BV
DSS
T
J
I
DSS
I
GSS
On Characteristics
V
GS(th)
V
GS(th)
T
J
R
DS(on)
Drain–Source Breakdown Voltage V
GS
= 0 V,
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage.
I
D
= 250
μ
A
30
V
I
D
= 250
μ
A, Referenced to 25
°
C
27
mV/
°
C
V
DS
= 24 V,
V
GS
=
±
20 V,
V
GS
= 0 V
V
DS
= 0 V
1
μ
A
nA
±
100
(Note 2)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
V
DS
= V
GS
,
I
D
= 250
μ
A, Referenced to 25
°
C
V
GS
= 10 V,
V
GS
= 4.5V,
V
GS
= 10 V, I
D
= 11 A, T
J
=125
°
C
I
D
= 250
μ
A
1
1.8
–4.9
3
V
mV/
°
C
I
D
= 11 A
I
D
= 10 A
7
9
9.1
8.5
12
13
m
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
g
FS
Forward Transconductance
1520
420
130
46
pF
pF
pF
S
V
DS
= 15 V,
f = 1.0 MHz
V
GS
= 0 V,
V
DS
= 5 V,
I
D
= 11 A
R
G
Switching Characteristics
(Note 2)
t
d(on)
Turn–On Delay Time
t
r
Turn–On Rise Time
t
d(off)
Turn–Off Delay Time
t
f
Turn–Off Fall Time
Q
g(TOT)
Total Gate Charge at Vgs=10V
Q
g
Total Gate Charge at Vgs=5V
Q
gs
Gate–Source Charge
Q
gd
Gate–Drain Charge
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current
V
SD
Drain–Source Diode Forward
Voltage
t
rr
Diode Reverse Recovery Time
Q
rr
Diode Reverse Recovery Charge
Notes:
1.
R
JA
is determined with the device mounted on a 1 in2 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. The thermal resistance from the junction to
the circuit board side of the solder ball, R
JB
, is defined for reference. For R
JC
, the thermal reference point for the case is defined as the top surface of the
copper chip carrier. R
θ
JC
and R
θ
JB
are guaranteed by design while R
θ
JA
is determined by the user's board design.
Gate Resistance
V
GS
= 15 mV,
f = 1.0 MHz
1.1
10
4
27
13
22
12
4.5
3.1
20
8
43
23
31
17
ns
ns
ns
ns
nC
nC
nC
nC
V
DD
= 15 V,
V
GS
= 10 V,
I
D
= 1 A,
R
GEN
= 6
V
DD
= 15 V, I
D
= 11 A,
1.7
1.2
A
V
V
GS
= 0 V,
I
S
= 1.7 A
(Note 2)
0.7
28
18
nS
nC
I
F
= 11A
d
iF
/d
t
= 100 A/μs
(Note 2)
a)
60°C/W when
mounted on a 1in
2
pad
of 2 oz copper, 1.5” x
1.5” x 0.062” thick
PCB
b)
108°C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2.
Pulse Test: Pulse Width < 300
μ
s, Duty Cycle < 2.0%
F
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