- 您現在的位置：買賣IC網 > PDF目錄375789 > FEDS81V26000-01 (OKI SEMICONDUCTOR CO., LTD.) 1,114,112-Word X 24-Bit Field Memory PDF資料下載
參數資料
| 型號： | FEDS81V26000-01 |
| 廠商： | OKI SEMICONDUCTOR CO., LTD. |
| 英文描述： | 1,114,112-Word X 24-Bit Field Memory |
| 中文描述： | 1114112字× 24位場記憶 |
| 文件頁數： | 1/20頁 |
| 文件大小： | 160K |
| 代理商： | FEDS81V26000-01 |
OKI Semiconductor
MS81V26000
1,114,112-Word
×
24-Bit Field Memory
FEDSMS81V26000-02
Issue Date: Dec 15, 2004
GENERAL DESCRIPTION
The OKI MS81V26000 is a high performance 26-Mbit, 1,100K
×
24-bit, Field Memory. It is especially designed
for high-speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital movies and
Multi-media systems. MS81V26000 is a FRAM for wide or low end use in general commodity TVs and VTRs
exclusively. MS81V26000 is not designed for the other use or high end use in medical systems, professional
graphics systems which require long term picture storage, data storage systems and others. More than two
MS81V26000s can be cascaded directly without any delay devices among the MS81V26000s. (Cascading of
MS81V26000 provides larger storage depth or a longer delay).
Each of the 24-bit planes has separate serial write and read ports. These employ independent control clocks to
support asynchronous read and write operations. Different clock rates are also supported that allow alternate data
rates between write and read data streams.
The MS81V26000 provides high speed FIFO, First-In First-Out, operation without external refreshing:
MS81V26000 refreshes its DRAM storage cells automatically, so that it appears fully static to the users.
Moreover, fully static type memory cells and decoders for serial access enable the refresh free serial access
operation, so that serial read and/or write control clock can be halted high or low for any duration as long as the
power is on. Internal conflicts of memory access and refreshing operations are prevented by special arbitration
logic.
The MS81V26000’s function is simple, and similar to a digital delay device whose delay-bit-length is easily set by
reset timing. The delay length, number of read delay clocks between write and read, is determined by externally
controlled write and read reset timings.
Additionally, the MS81V26000 has write mask function or input enable function (IE), and read-data skipping
function or output enable function (OE) . The differences between write enable (WE) and input enable (IE), and
between read enable (RE) and output enable (OE) are that WE and RE can stop serial write/read address
increments, but IE and OE cannot stop the increment, when write/read clocking is continuously applied to
MS81V26000. The input enable (IE) function allows the user to write into selected locations of the memory only,
leaving the rest of the memory contents unchanged. This facilitates data processing to display a “picture in picture”
on a TV screen.
1/20
相關PDF資料 |
PDF描述 |
|---|---|
| FEDS82V16520A-01 | 262,144-Word 】 32-Bit 】 2-Bank SGRAM |
| FEDS82V48540-01 | 393,216-Word 】 32-Bit 】 4-Bank FIFO-SGRAM |
| FEP16AT | Fast Rectifiers (Glass Passivated) |
| FEP16DT | DIODE SM SCHOT C-2PF SOT-23 SINGLE |
| FEP16DTA | Fast Rectifiers (Glass Passivated) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| FEDS82V16520A-01 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:262,144-Word × 32-Bit × 2-Bank SGRAM |
| FEDS82V48540-01 | 制造商:OKI 制造商全稱:OKI electronic componets 功能描述:393,216-Word × 32-Bit × 4-Bank FIFO-SGRAM |
| FEDSM2000-11043 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DUAL EMISSION LASER INDUCED FLUORESCENCE TECHNIQUE (DELIF) FOR OIL FILM THICKNESS AND TEMPERATURE MEASUREMENT |
| FEDWC375/12014+ | 制造商: 功能描述: 制造商:undefined 功能描述: |
| FEE160-2-2NL | 制造商:Pulse Electronics Corporation 功能描述: |
發布緊急采購，3分鐘左右您將得到回復。