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參數資料
| 型號： | FM180-S |
| 廠商： | 美麗微半導體有限公司 |
| 英文描述： | Chip Schottky Barrier Diodes - Silicon epitaxial planer type |
| 中文描述： | 肖特基二極管芯片-硅外延式龍門 |
| 文件頁數： | 1/2頁 |
| 文件大小： | 80K |
| 代理商： | FM180-S |
FM120-S THRU FM1100-S
Features
Plastic package has Underwriters Laboratory
Flammability Classification 94V-O Utilizing Flame
Retardant Epoxy Molding Compound.
For surface mounted applications.
Exceeds environmental standards of ML-S-19500 /
228
Low leakage current.
Mechanical data
Case : Molded plastic, JEDECDO-214AC
Terminals : Solder plated, solderable per MIL-STD-750,
Method 2026
Polarity : Indicated by cathode band
Mounting Position : Any
Weight : 0.0015 ounce, 0.05 gram
(V)
(V)
(V)
(V)
(
o
C)
FM120-S
SS12
20
14
20
FM130-S
SS13
30
21
30
FM140-S
SS14
40
28
40
FM150-S
SS15
50
35
50
FM160-S
SS16
60
42
60
FM180-S
SS18
80
56
80
FM1100-S
S110
100
70
100
0.50
0.70
0.85
-55 to +125
-55 to +150
SYMBOLS
MARKING
CODE
Operating
temperature
V
RRM
*1
V
RMS
*2
V
R
*3
V
F
*4
MAXIMUM RATINGS
(AT T
A
=25
o
C unless otherwise noted)
PARAMETER
CONDITIONS
Symbol
MIN.
TYP.
MAX.
UNIT
Forward rectified current
See Fig.1
I
O
1.0
A
Forward surge current
8.3ms single half sine-wave superimposed on
rate load (JEDEC methode)
I
FSM
30
A
V
R
= V
RRM
T
A
= 25
o
C
0.5
mA
V
R
= V
RRM
T
A
= 125
o
C
10
mA
Thermal resistance
Junction to ambient
R
q
JA
88
o
C / w
Diode junction capacitance
f=1MHz and applied 4vDC reverse voltage
C
J
120
pF
Storage temperature
T
STG
-55
+150
o
C
Reverse current
I
R
*1 Repetitive peak reverse voltage
*2 RMS voltage
*3 Continuous reverse voltage
*4 Maximum forward voltage
Chip Schottky Barrier Diodes
Silicon epitaxial planer type
Formosa MS
0.205(5.2)
0.189(4.8)
0.012(0.3) Typ.
0.106(2.7)
0.091(2.3)
0.181(4.6)
0.165(4.2)
0.071(1.8)
0.060(1.5)
0.040 (1.0) Typ.
0.040(1.0) Typ.
Dimensions in inches and (millimeters)
SMA-S
0.055(1.4)
0.063(1.6)
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| FM150-S | Chip Schottky Barrier Diodes - Silicon epitaxial planer type |
| FM1100-S | Chip Schottky Barrier Diodes - Silicon epitaxial planer type |
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