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參數資料
型號: FM27C512VE150
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 524,288-Bit (64K x 8) High Performance CMOS EPROM
中文描述: 64K X 8 OTPROM, 150 ns, PQCC32
封裝: PLASTIC, LCC-32
文件頁數: 1/10頁
文件大小: 100K
代理商: FM27C512VE150
1
www.fairchildsemi.com
F
FM27C512
FM27C512
524,288-Bit (64K x 8) High Performance CMOS EPROM
General Description
The FM27C512 is a high performance 512K UV Erasable Electri-
cally Programmable Read Only Memory (EPROM). It is manufac-
tured using Fairchild’s proprietary CMOS AMG EPROM tech-
nology for an excellent combination of speed and economy while
providing excellent reliability.
The FM27C512 provides microprocessor-based systems storage
capacity for portions of operating system and application soft-
ware. Its 90 ns access time provides no wait-state operation with
high-performance CPUs. The FM27C512 offers a single chip
solution for the code storage requirements of 100% firmware-
based equipment. Frequently-used software routines are quickly
executed from EPROM storage, greatly enhancing system utility.
The FM27C512 is configured in the standard JEDEC EPROM
pinout which provides an easy upgrade path for systems which are
currently using standard EPROMs.
Block Diagram
January 2000
The FM27C512 is one member of a high density EPROM Family
which range in densities up to 4 Megabit.
Features
I
High performance CMOS
— 90 ns access time
I
Fast turn-off for microprocessor compatibility
I
Manufacturers identification code
I
JEDEC standard pin configuration
— 28-pin PDIP package
— 32-pin chip carrier
— 28-pin CERDIP package
DS800035-1
AMG is a trademark of WSI, Inc.
1998 Fairchild Semiconductor Corporation
Output Enable and
Chip Enable Logic
Y Decoder
X Decoder
.
.
Output
Buffers
524,288-Bit
Cell Matrix
Data Outputs O0 - O7
VCC
GND
VPP
OE
CE/PGM
A0 - A15
Address
Inputs
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