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參數(shù)資料
| 型號： | FM27C512VE150 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 524,288-Bit (64K x 8) High Performance CMOS EPROM |
| 中文描述： | 64K X 8 OTPROM, 150 ns, PQCC32 |
| 封裝： | PLASTIC, LCC-32 |
| 文件頁數(shù)： | 2/10頁 |
| 文件大小： | 100K |
| 代理商： | FM27C512VE150 |
2
www.fairchildsemi.com
F
FM27C512
Connection Diagrams
Compatible EPROM pin configurations are shown in the blocks adjacement to the FM27C512 pins.
Commercial Temp Range (0
°
C to +70
°
C)
Parameter/Order Number
Access Time (ns)
FM27C512 Q, N, V 90
90
FM27C512 Q, N, V 120
120
FM27C512 Q, N, V 150
150
Industrial Temp Range (-40
°
C to +85
°
C)
Parameter/Order Number
Access Time (ns)
FM27C512 QE, NE, VE 120
120
FM27C512 QE, NE, VE 150
150
Q = Quartz-Windowed Ceramic DIP Package
N = Plastic DIP Package
V = PLCC Package
All packages conform to the JEDEC standard.
All versions are guaranteed to function for slower speeds.
Pin Names
A0
–
A15
Addresses
CE/PGM
Chip Enable/Program
OE
Output Enable
O0
–
O7
Outputs
NC
Don
’
t Care (During Read)
PLCC
V
DIP
FM27C512
A8
A9
A11
NC
OE/VPP
A10
CE/PGM
O7
O8
A6
A5
A4
A3
A2
A1
A0
NC
O0
A
A
A
N
A
A
O
O
G
N
O
O
O
5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
14 15 16 17 18 19 20
4 3 2 1 32 31 30
DS800035-2
DS800035-3
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
A14
A13
A8
A9
A11
OE/VPP
A10
CE/PGM
O7
O6
O5
O4
O3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
XX/PGM
XX
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
VCC
A14
A13
A8
A9
A11
OE
A10
CE/PGM
O7
O6
O5
O4
O3
27C256
27C010 27C040
VCC
A18
A17
A14
A13
A8
A9
A11
OE
A10
CE/PGM
O7
O6
O5
O4
O3
27C040
27C010
27C256
XX/
VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
XX/
VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
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| FM27C512VE45 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 EPROM |
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