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參數資料
| 型號： | FM34W02UE |
| 廠商： | Fairchild Semiconductor Corporation |
| 元件分類： | DRAM |
| 英文描述： | 2K-Bit Standard 2-Wire Bus Interface Serial EEPROM with Full Array Write Protect |
| 中文描述： | 的2K位標準2線總線接口的串行EEPROM與全陣列寫保護 |
| 文件頁數： | 6/12頁 |
| 文件大小： | 95K |
| 代理商： | FM34W02UE |
6
www.fairchildsemi.com
FM34W02U Rev. A.1
F
w
Device
Address Pins
A0
A1
Memory Size
Number of
Page Blocks
A2
FM34W02U
ADR
ADR
ADR
2048 Bits
1
Pin Descriptions
Serial Clock (SCL)
The SCL input is used to clock all data into and out of the device.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and out of the
device. It is an open drain output and may be wire
–
ORed with any
number of open drain or open collector outputs.
Device Operation Inputs (A0, A1, A2)
Device address pins A0, A1, and A2 are connected to V
CC
or V
SS
to configure the EEPROM chip address. Table A shows the active
pins across the FM34W02U device family.
Table 1.
Device
A0
A1
A2
Effects of Addresses
FM34W02U
ADR
ADR
ADR
8 devices max.
Device Operation
The FM34W02U supports a bidirectional bus oriented protocol.
The protocol defines any device that sends data onto the bus as
a transmitter and the receiving device as the receiver. The device
controlling the transfer is the master and the device that is
controlled is the slave. The master will always initiate data
transfers and provide the clock for both transmit and receive
operations. Therefore, the FM34W02U will be considered a slave
in all applications.
Clock and Data Conventions
Data states on the SDA line can change only during SCL LOW.
SDA state changes during SCL HIGH are reserved for indicating
start and stop conditions. Refer to Figures 1 and 2.
Start Condition
All commands are preceded by the start condition, which is a
HIGH to LOW transition of SDA when SCL is HIGH. The
FM34W02U continuously monitors the SDA and SCL lines for the
start condition and will not respond to any command until this
condition has been met.
Stop Condition
All communications are terminated by a stop condition, which is a
LOW to HIGH transition of SDA when SCL is HIGH. The stop
condition is also used by the FM34W02U to place the device in the
standby power mode.
ACKNOWLEDGE
Acknowledge is a software convention used to indicate successful
data transfers. The transmitting device, either master or slave, will
release the bus after transmitting eight bits.
During the ninth clock cycle the receiver will pull the SDA line to
LOW to acknowledge that it received the eight bits of data. Refer
to Figure 3.
The FM34W02U device will always respond with an acknowledge
after recognition of a start condition and its slave address. If both
the device and a write operation have been selected, the
FM34W02U will respond with an acknowledge after the receipt of
each subsequent eight bit byte.
In the Read mode the FM34W02U slave will transmit eight bits of
data, release the SDA line and monitor the line for an acknowl-
edge. If an acknowledge is detected and no stop condition is
generated by the master, the slave will continue to transmit data.
If an acknowledge is not detected, the slave will terminate further
data transmissions and await the stop condition to return to the
standby power mode.
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