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參數資料
| 型號： | FM3540SMT14 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 標準邏輯 |
| 英文描述： | 4/5 Bit Multiplexed, 1 Bit Latched Port with Standard 2-Wire Bus Interface and Non-Volatile Latches |
| 中文描述： | SPECIALTY LOGIC CIRCUIT, PDSO14 |
| 封裝： | TSSOP-14 |
| 文件頁數： | 1/10頁 |
| 文件大小： | 100K |
| 代理商： | FM3540SMT14 |
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www.fairchildsemi.com
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FM3540/60 Rev. C
FM3540/60
4/5 Bit Multiplexed, 1 Bit Latched Port with Standard
2-Wire Bus Interface and Non-Volatile Latches
General Description
The FM3540/60 multiplexes the I-port input signals with two
internal non-volatile registers that can be loaded through the serial
port. The multiplexer is selected via the serial port and defaults to
the I-Port upon power-up. Pull-up resistors are provided on the
input port to accommodate connections to open drain outputs and
to eliminate the need for external resistors. The device supports
a choice of either 2.5V output or Open Drain Outputs for easy
interface to devices with different VDD Levels.
The serial port is an IIC compatible slave only interface and
supports both 100kbits and 400kbits modes of operation. The port
is used to read the I-Port, Write Data to the internal non-volatile
Block Diagram
October 2001
registers and select whether the I-Port or one of the internal non-
volatile registers is output to the Y-port. The FM3540/60 is
fabricated with an advanced CMOS technology to achieve high
density and low power.
Features
I
Extended Operating Voltage Range 3.0V-5.5V
I
IIC Compatible Slave Interface.
I
ESD performance: Human body model > 2000V
I
Choice of 2.5V outputs or Open-Drain Outputs
2001 Fairchild Semiconductor Corporation
SOPRA
SOPRB
IIC
Interface
Start/Stop
Logic
Shift
Register
Slave Address
Register
Comparator
Control Logic
Mux3
Mux2
Non_Mux_Out
Y[4:0]
Mux1
I[4:0]
IIC Read Logic
SDA
SCL
ASEL
OVRD
MUXSEL
MXSB, MXSA
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