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參數資料
| 型號： | FMS6690MTC20X |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 消費家電 |
| 英文描述： | Six Channel, 6th Order SD/PS/HD Video Filter Driver |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO20 |
| 封裝： | ROHS COMPLIANT, MO-153AC, TSSOP-20 |
| 文件頁數： | 6/10頁 |
| 文件大小： | 96K |
| 代理商： | FMS6690MTC20X |
FMS6690 Rev. 2A
6
www.fairchildsemi.com
F
The same method can be used for biased signals with the addi-
tion of a pull-up resistor to make sure the clamp never operates.
The internal pull-down resistance is 800k
±20% so the exter-
nal resistance should be 7.5M
to set the DC level to 500mV. If
a pull-up resistance less than 7.5M
is desired, an external
pull-down can be added such that the DC input level is set to
500mV.
Figure 6.
Biased SCART with DC-coupled Outputs
The same circuits can be used with AC-coupled outputs if
desired.
Figure 7. DC-coupled Inputs, AC-coupled Outputs
Figure 8.
DC-coupled Inputs, AC-coupled Outputs
Figure 9.
Biased SCART with AC-coupled Outputs
NOTE: The video tilt or line time distortion will be dominated by
the AC-coupling capacitor. The value may need to be increased
beyond 220uF in order to obtain satisfactory operation in some
applications.
Power Dissipation
The FMS6690 output drive configuration must be considered
when calculating overall power dissipation. Care must be taken
not to exceed the maximum die junction temperature. The fol-
lowing example can be used to calculate the FMS6690’s power
dissipation and internal temperature rise.
T
j
= T
A
+ P
d
Θ
JA
where P
d
= P
CH1
+ P
CH2
+ P
CHx
and P
CHx
= V
s
I
CH
- (V
O2
/R
L
)
where
V
O
= 2V
in
+ 0.280V
I
CH
= (I
CC
/ 6) + (V
O
/R
L
)
V
in
= RMS value of input signal
I
CC
= 60mA
V
s
= 5V
R
L
= channel load resistance
Board layout can also affect thermal characteristics. Refer to the
Layout Considerations
Section for more information.
Layout Considerations
General layout and supply bypassing play major roles in high
frequency performance and thermal characteristics. Fairchild
offers a demonstration board, FMS6690DEMO, to use as a
guide for layout and to aid in device testing and characterization.
The FMS6690DEMO is a 4-layer board with a full power and
ground plane. Following this layout configuration will provide the
optimum performance and thermal characteristics. For optimum
results, follow the steps below as a basis for high frequency lay-
out:
Include 10
μ
F and 0.1
μ
F ceramic bypass capacitors
Place the 10
μ
F capacitor within 0.75 inches of the power pin
Place the 0.1
μ
F capacitor within 0.1 inches of the power pin
For multi-layer boards, use a large ground plane to help dissi-
pate heat
For 2 layer boards, use a ground plane that extends beyond
the device by at least 0.5”
Minimize all trace lengths to reduce series inductances
75
LCVF
Bias
Input
75
0.1u
External Video
source must
be AC-coupled.
500mV +/-350mV
7.5M
DVD or
STB
SoC
DAC
Output
75
LCVF
Clamp
Inactive
0V - 1.4V
220u
75
LCVF
Clamp
Active
0.1u
0V - 1.4V
220u
DVD or
STB
SoC
DAC
Output
75
LCVF
Clamp
Active
75
0.1u
External video
source must
be AC-coupled.
220u
500mV +/-350mV
7.5M
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