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參數(shù)資料
型號: GS816236BD-200I
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 1M x 18, 512K x 36 18MbS/DCD Sync Burst SRAMs
中文描述: 512K X 36 CACHE SRAM, 6.5 ns, PBGA165
封裝: FBGA-165
文件頁數(shù): 10/37頁
文件大小: 866K
代理商: GS816236BD-200I
Synchronous Truth Table
Operation
Address Used
State
Diagram
Key
5
E
1
ADSP
ADSC
ADV
W
3
DQ
4
Deselect Cycle, Power Down
None
X
H
X
L
X
X
High-Z
Read Cycle, Begin Burst
External
R
L
L
X
X
X
Q
Read Cycle, Begin Burst
External
R
L
H
L
X
F
Q
Write Cycle, Begin Burst
External
W
L
H
L
X
T
D
Read Cycle, Continue Burst
Next
CR
X
H
H
L
F
Q
Read Cycle, Continue Burst
Next
CR
H
X
H
L
F
Q
Write Cycle, Continue Burst
Next
CW
X
H
H
L
T
D
Write Cycle, Continue Burst
Next
CW
H
X
H
L
T
D
Read Cycle, Suspend Burst
Current
X
H
H
H
F
Q
Read Cycle, Suspend Burst
Current
H
X
H
H
F
Q
Write Cycle, Suspend Burst
Current
X
H
H
H
T
D
Write Cycle, Suspend Burst
Current
H
X
H
H
T
D
Notes:
1.
2.
3.
X = Don’t Care, H = High, L = Low
W = T (True) and F (False) is defined in the Byte Write Truth Table preceding
G is an asynchronous input. G can be driven high at any time to disable active output drivers. G low can only enable active drivers (shown
as “Q” in the Truth Table above).
All input combinations shown above are tested and supported. Input combinations shown in gray boxes need not be used to accomplish
basic synchronous or synchronous burst operations and may be avoided for simplicity.
Tying ADSP high and ADSC low allows simple non-burst synchronous operations. See
BOLD
items above.
Tying ADSP high and ADV low while using ADSC to load new addresses allows simple burst operations. See
ITALIC
items above.
4.
5.
6.
GS816218/36B(B/D)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.04 9/2005
10/37
2004, GSI Technology
相關(guān)PDF資料
PDF描述
GS816236BD-250 1M x 18, 512K x 36 18MbS/DCD Sync Burst SRAMs
GS816236BD-250I 1M x 18, 512K x 36 18MbS/DCD Sync Burst SRAMs
GS816236BGB-150 1M x 18, 512K x 36 18MbS/DCD Sync Burst SRAMs
GS816236BGB-150I 1M x 18, 512K x 36 18MbS/DCD Sync Burst SRAMs
GS816236BGB-200 1M x 18, 512K x 36 18MbS/DCD Sync Burst SRAMs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS816236BD-225M 制造商:GSI Technology 功能描述:GS816236BD-225M - Trays
GS816236BD-250 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 18MBIT 512KX36 5.5NS/2.5NS 165FBGA - Trays
GS816236BD-250I 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 18MBIT 512KX36 5.5NS/2.5NS 165FBGA - Trays
GS816236BD-250IV 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 18MBIT 512KX36 5.5NS/2.5NS 165FPBGA - Trays
GS816236BD-250M 制造商:GSI Technology 功能描述:GS816236BD-250M - Trays
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