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參數資料
| 型號： | GS8170LW72C-250I |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Low-Noise Operational Amplifier 8-SOIC -40 to 85 |
| 中文描述： | 35.7西格馬1x1Lp的CMOS的I / O后寫入SigmaRAM |
| 文件頁數： | 17/27頁 |
| 文件大?。?/td> | 884K |
| 代理商： | GS8170LW72C-250I |
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GS8170LW36/72C-333/300/250/200
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.03 1/2005
17/27
2002, GSI Technology, Inc.
Timing Parameter Key—Pipelined Read Cycle Timing
Timing Parameter Key—Late Write Mode Control and Data In Timing
JTAG Port Operation
Overview
The JTAG Port on this RAM operates in a manner that is compliant with IEEE Standard 1149.1-1990, a serial boundary scan interface standard
(commonly referred to as JTAG). The JTAG Port input interface levels scale with V
DD
. The JTAG output drivers are powered by V
DDQ
.
Disabling the JTAG Port
It is possible to use this device without utilizing the JTAG port. The port is reset at power-up and will remain inactive unless clocked. TCK, TDI,
and TMS are designed with internal pull-up circuits.To assure normal operation of the RAM with the JTAG Port unused, TCK, TDI, and TMS may
be left floating or tied to either V
DD
or V
SS
. TDO should be left unconnected.
A
B
Q(A)
Q(B)
KHCZ
KHCX1
CHQX
CHQV
KLCL
KHCH
KHQZ
KHQX
KHQV
KHQX1
KHAX
AVKH
KHKH
KLKH
KHKL
CK
A
E2
DQ(Data Out)
CQ
A
B
C
D(A)
D(B)
D(C)
KHDX
DVKH
KHnX
nVKH
KHAX
AVKH
KHKH
KLKH
KHKL
Note: nVKH = EVKH, WVKH, BVKH, etc.
KHnX = KHEX, KHWX, KHBX, etc.
CK
A
E2
DQ(Data Out)
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| GS8170LW72C-300 | Low-Noise Operational Amplifier 8-SOIC -40 to 85 |
| GS8170LW72C-300I | Low-Noise Operational Amplifier 8-SOIC -40 to 85 |
| GS8170LW72C-333 | Low-Noise Operational Amplifier 8-PDIP -40 to 85 |
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