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參數(shù)資料
型號(hào): GS8170LW72C-333I
廠商: Electronic Theatre Controls, Inc.
英文描述: 18Mb sigma 1x1Lp CMOS I/O Late Write SigmaRAM
中文描述: 35.7西格馬1x1Lp的CMOS的I / O后寫入SigmaRAM
文件頁數(shù): 7/27頁
文件大小: 884K
代理商: GS8170LW72C-333I
GS8170LW36/72C-333/300/250/200
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.03 1/2005
7/27
2002, GSI Technology, Inc.
Special Functions
Burst Cycles
SRAMs provide an on-chip burst address generator that can be utilized, if desired, to simplify burst read or write implementations.
The ADV control pin, when driven high, commands the SRAM to advance the internal address counter and use the counter
generated address to read or write the SRAM. The starting address for the first cycle in a burst cycle series is loaded into the SRAM
by driving the ADV pin low, into Load mode.
SigmaRAM Pipelined Burst Reads with Counter Wraparound
SigmaRAM Late Write SRAM Burst Writes with Counter Wraparound
Read A
Cont A+1
Cont A+2
Cont A+3
Cont A
Deselect
A
Q(A)
Q(A+1)
Q(A+2)
Q(A+3)
Q(A)
CK
Address
ADV
E1
W
DQA0–DQA8
CQ
Write A+2
Cont A+3
Cont A
Cont A+1
Cont A+2
Deselect
A+2
D(A+2)
D(A+3)
D(A)
D(A+1)
D(A+2)
CK
Address
ADV
E1
W
Ba–Bb
DQ
CQ
相關(guān)PDF資料
PDF描述
GS8170LW36C-333I 18Mb sigma 1x1Lp CMOS I/O Late Write SigmaRAM
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