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參數(shù)資料
| 型號(hào)： | GS8322V72GC-250I |
| 廠(chǎng)商： | GSI TECHNOLOGY |
| 元件分類(lèi)： | DRAM |
| 英文描述： | 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs |
| 中文描述： | 512K X 72 CACHE SRAM, 6.5 ns, PBGA209 |
| 封裝： | 14 X 22 MM, 1 MM PITCH, LEAD FREE, BGA-209 |
| 文件頁(yè)數(shù)： | 16/42頁(yè) |
| 文件大小： | 1038K |
| 代理商： | GS8322V72GC-250I |
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First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
W
R
R
W
R
X
X
X
CR
R
CW
CR
CR
W
CW
W
CW
Notes:
1.
2.
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
3.
Preliminary
GS8322V18(B/E)/GS8322V36(B/E)/GS8322V72(C)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.04 4/2005
16/42
2003, GSI Technology
Simplified State Diagram with G
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS8322V18GE-225 | 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs |
| GS8322V18GE-225I | 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs |
| GS8322V18GE-250 | 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs |
| GS8322V18GE-250I | 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs |
| GS8322V36B-133 | 2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8322Z18AB-200I | 制造商:GSI Technology 功能描述:119 BGA - Bulk |
| GS8322Z18AB-200IV | 制造商:GSI Technology 功能描述:165 BGA - Bulk |
| GS8322Z18AB-200V | 制造商:GSI Technology 功能描述:165 BGA - Bulk |
| GS8322Z18AB-250 | 制造商:GSI Technology 功能描述:119 BGA - Bulk |
| GS8322Z18AB-375 | 制造商:GSI Technology 功能描述:119 BGA - Bulk |
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