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參數資料
型號: GS8642ZV18B
廠商: GSI TECHNOLOGY
英文描述: 72Mb Pipelined and Flow Through Synchronous NBT SRAM
中文描述: 72Mb流水線和流量,通過同步唑的SRAM
文件頁數: 1/32頁
文件大小: 805K
代理商: GS8642ZV18B
Product Preview
GS8642ZV18(B)/GS8642ZV36(B)/GS8642ZV72(C)
72Mb Pipelined and Flow Through
Synchronous NBT SRAM
300 MHz
167 MHz
1.8 V V
DD
1.8 V I/O
119- & 209-Bump BGA
Commercial Temp
Industrial Temp
Rev: 1.02 5/2005
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
1/32
2004, GSI Technology
Features
NBT (No Bus Turn Around) functionality allows zero wait
Read-Write-Read bus utilization; fully pin-compatible with
both pipelined and flow through NtRAM, NoBL and
ZBT SRAMs
1.8 V +10%/–10% core power supply
1.8 V I/O supply
User-configurable Pipeline and Flow Through mode
ZQ mode pin for user-selectable high/low output drive
IEEE 1149.1 JTAG-compatible Boundary Scan
LBO pin for Linear or Interleave Burst mode
Pin-compatible with 2Mb, 4Mb, 8Mb, and 16Mb devices
Byte write operation (9-bit Bytes)
3 chip enable signals for easy depth expansion
ZZ Pin for automatic power-down
JEDEC-standard 119- or 209-bump BGA package
Pb-Free 119- and 209-bump BGA packages available
Functional Description
The GS8642ZV18/36/72 is a 72Mbit Synchronous Static
SRAM. GSI's NBT SRAMs, like ZBT, NtRAM, NoBL or
other pipelined read/double late write or flow through read/
single late write SRAMs, allow utilization of all available bus
bandwidth by eliminating the need to insert deselect cycles
when the device is switched from read to write cycles.
Because it is a synchronous device, address, data inputs, and
read/write control inputs are captured on the rising edge of the
input clock. Burst order control (LBO) must be tied to a power
rail for proper operation. Asynchronous inputs include the
Sleep mode enable (ZZ) and Output Enable. Output Enable can
be used to override the synchronous control of the output
drivers and turn the RAM's output drivers off at any time.
Write cycles are internally self-timed and initiated by the rising
edge of the clock input. This feature eliminates complex off-
chip write pulse generation required by asynchronous SRAMs
and simplifies input signal timing.
The GS8642ZV18/36/72 may be configured by the user to
operate in Pipeline or Flow Through mode. Operating as a
pipelined synchronous device, in addition to the rising-edge-
triggered registers that capture input signals, the device
incorporates a rising edge triggered output register. For read
cycles, pipelined SRAM output data is temporarily stored by
the edge-triggered output register during the access cycle and
then released to the output drivers at the next rising edge of
clock.
The GS8642ZV18/36/72 is implemented with GSI's high
performance CMOS technology and is available in a JEDEC-
standard 119-bump, 165-bump or 209-bump BGA package.
Parameter Synopsis
-300
-250
-200
-167
Unit
Pipeline
3-1-1-1
t
KQ
(x18/x36)
t
KQ
(x72)
tCycle
Curr (x18)
Curr (x36)
Curr (x72)
t
KQ
tCycle
Curr (x18)
Curr (x36)
Curr (x72)
2.3
3.0
3.3
2.5
3.0
4.0
3.0
3.0
5.0
3.5
3.5
6.0
ns
ns
ns
400
480
590
5.5
5.5
285
330
425
340
410
520
6.5
6.5
245
280
370
290
350
435
7.5
7.5
220
250
315
260
305
380
8.0
8.0
210
240
300
mA
mA
mA
ns
ns
mA
mA
mA
Flow Through
2-1-1-1
相關PDF資料
PDF描述
GS8642ZV18B-167 72Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8642ZV18B-167I 72Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8642ZV18B-200 72Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8642ZV18B-200I 72Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8642ZV18B-250 72Mb Pipelined and Flow Through Synchronous NBT SRAM
相關代理商/技術參數
參數描述
GS8642ZV18B-167 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8642ZV18B-167I 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8642ZV18B-200 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8642ZV18B-200I 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM
GS8642ZV18B-250 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Pipelined and Flow Through Synchronous NBT SRAM
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