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參數資料
| 型號： | GS8662D36GE-333I |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 72Mb SigmaQuad-II Burst of 4 SRAM |
| 中文描述： | 2M X 36 DDR SRAM, 0.45 ns, PBGA165 |
| 封裝： | 15 X 17 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165 |
| 文件頁數： | 16/29頁 |
| 文件大小： | 896K |
| 代理商： | GS8662D36GE-333I |
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Nybble Write Clock Truth Table
NW
NW
NW
NW
Current Operation
D
D
D
D
K
↑
(t
n+1
)
K
↑
(t
n+1
)
K
↑
(t
n+2
)
K
↑
(t
n+2
)
K
↑
(t
n
)
K
↑
(t
n+1
)
K
↑
(t
n+1
)
K
↑
(t
n+2
)
K
↑
(t
n+2
)
T
T
T
T
Write
Dx stored if NWn = 0 in all four data transfers
D0
D2
D3
D4
T
F
F
F
Write
Dx stored if NWn = 0 in 1st data transfer only
D0
X
X
X
F
T
F
F
Write
Dx stored if NWn = 0 in 2nd data transfer only
X
D1
X
X
F
F
T
F
Write
Dx stored if NWn = 0 in 3rd data transfer only
X
X
D2
X
F
F
F
T
Write
Dx stored if NWn = 0 in 4th data transfer only
X
X
X
D3
F
F
F
F
Write Abort
No Dx stored in any of the four data transfers
X
X
X
X
Notes
:
1.
2.
“1” = input “high”; “0” = input “low”; “X” = input “don’t care”; “T” = input “true”; “F” = input “false”.
If one or more NWn = 0, then NW = “T”, else NW = “F”.
x8 Nybble Write Enable (NWn) Truth Table
NW0 NW1
D0–D3
D4–D7
1
1
Don’t Care
Don’t Care
0
1
Data In
Don’t Care
1
0
Don’t Care
Data In
0
0
Data In
Data In
Preliminary
GS8662D08/09/18/36E-333/300/250/200/167
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01a 2/2006
16/29
2005, GSI Technology
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