欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數(shù)資料
型號: GS8662R18GE-200I
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 72Mb SigmaCIO DDR-II Burst of 4 SRAM
中文描述: 4M X 18 DDR SRAM, 0.45 ns, PBGA165
封裝: 15 MM X 17 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165
文件頁數(shù): 27/37頁
文件大小: 942K
代理商: GS8662R18GE-200I
Preliminary
GS8662R08/09/18/36E-333/300/250/200/167
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 9/2005
27/37
2005, GSI Technology
Boundary Scan Register
The Boundary Scan Register is a collection of flip flops that can be preset by the logic level found on the RAM’s input or I/O pins.
The flip flops are then daisy chained together so the levels found can be shifted serially out of the JTAG Port’s TDO pin. The
Boundary Scan Register also includes a number of place holder flip flops (always set to a logic 1). The relationship between the
device pins and the bits in the Boundary Scan Register is described in the Scan Order Table following. The Boundary Scan
Register, under the control of the TAP Controller, is loaded with the contents of the RAMs I/O ring when the controller is in
Capture-DR state and then is placed between the TDI and TDO pins when the controller is moved to Shift-DR state. SAMPLE-Z,
SAMPLE/PRELOAD and EXTEST instructions can be used to activate the Boundary Scan Register.
Instruction Register
ID Code Register
·
31 30 29
Boundary Scan Register
0
1
2
0
· · ·
1
2
0
Bypass Register
TDI
TDO
TMS
TCK
Test Access Port (TAP) Controller
1
·
1
0
·
·
·
·
·
·
·
·
·
Control Signals
·
JTAG TAP Block Diagram
Identification (ID) Register
The ID Register is a 32-bit register that is loaded with a device and vendor specific 32-bit code when the controller is put in
Capture-DR state with the IDCODE command loaded in the Instruction Register. The code is loaded from a 32-bit on-chip ROM.
It describes various attributes of the RAM as indicated below. The register is then placed between the TDI and TDO pins when the
controller is moved into Shift-DR state. Bit 0 in the register is the LSB and the first to reach TDO when shifting begins.
相關(guān)PDF資料
PDF描述
GS8662R18GE-250 72Mb SigmaCIO DDR-II Burst of 4 SRAM
GS8662R18GE-250I 72Mb SigmaCIO DDR-II Burst of 4 SRAM
GS8662R18GE-300 72Mb SigmaCIO DDR-II Burst of 4 SRAM
GS8662R18GE-300I 72Mb SigmaCIO DDR-II Burst of 4 SRAM
GS8662R18GE-333 72Mb SigmaCIO DDR-II Burst of 4 SRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS8662R18GE-250 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaCIO DDR-II Burst of 4 SRAM
GS8662R18GE-250I 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaCIO DDR-II Burst of 4 SRAM
GS8662R18GE-300 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaCIO DDR-II Burst of 4 SRAM
GS8662R18GE-300I 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaCIO DDR-II Burst of 4 SRAM
GS8662R18GE-333 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb SigmaCIO DDR-II Burst of 4 SRAM
主站蜘蛛池模板: 安陆市| 鸡东县| 蓬莱市| 桦南县| 南华县| 宁蒗| 广昌县| 马关县| 宜昌市| 丰城市| 正定县| 思茅市| 宝山区| 隆林| 潢川县| 拜泉县| 万山特区| 磴口县| 钟祥市| 鲁甸县| 霸州市| 五河县| 泸水县| 孟村| 寿宁县| 蓬莱市| 汶上县| 淮阳县| 郴州市| 六盘水市| 钟祥市| 五寨县| 怀仁县| 陵水| 开平市| 克什克腾旗| 安图县| 清新县| 连城县| 大洼县| 肃北|