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參數(shù)資料

First Write

First Read

Burst Write

Burst Read

Deselect

Notes:

The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.

Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing

through a deselect cycle. Dummy read cycles increment the address counter just like normal read cycles.

Transitions shown in gray tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet

Data Input Set Up Time.

GS88118B(T/D)/GS88132B(T/D)/GS88136B(T/D)

Rev: 1.05 11/2005

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

15/39

2002, GSI Technology

Simplified State Diagram with G

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
GS88136BD-150I	制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs
GS88136BD-150IV	制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs
GS88136BD-150V	制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs
GS88136BD-200	制造商: 功能描述: 制造商:undefined 功能描述:
GS88136BD-200I	制造商:GSI 制造商全稱:GSI Technology 功能描述:512K x 18, 256K x 32, 256K x 36 9Mb Sync Burst SRAMs

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