
GT-48004A
Four Port Switched Fast Ethernet
Controller
Preliminary
Revision 1.0
2/13/98
Please contact Galileo Technology for possible
updates before finalizing a design.
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Single-chip 4-port Switched Fast Ethernet Controller
- Provides packet switching functions between four
on-chip Fast Ethernet ports and the PCI bus
- Switch expansion via 66MHz PCI bus (2Gbps)
- Designed for Fast Ethernet Switches from 4 ports
to 24 ports
GalNet Architecture Family Member
- Connects to other GalNet Family Devices through
33MHz-to-66MHz PCI bridges
- 100% software compatible with GT-48002A
Incorporates four 802.3 compliant 10/100Mbps Media
Access Controllers
- Direct Interface to MII (Media Independent
Interface)
- Half/Full Duplex Support (up to 200 Mbps/port)
- IEEE 802.3 100Base-TX, T4, and FX compatible
Full MII Management Support (MDC/MDIO) via CPU
Auto-negotiation supported through MII Interface
Direct support for packet buffering
- Glueless interface to 2 or 4 Mbyte of 35ns EDO
DRAM
- Up to 2K buffers, 1536-bytes each, dynamically
High-Performance Distributed Switching Engine
- Performs forwarding and filtering at full wire speed
- 148,800 packets/s on each Ethernet port
- Flexible software or hardware intervention in
packet routing decisions
- allocated to the receive and PCI ports
Virtual LAN Support
- Port based virtual LANs
- Ability to define “super-VLANs” that span multiple
VLANs
Quality-of-Service Queuing
- Priority queuing based on port number or MAC
address
Advanced address recognition
- Intelligent address recognition mechanism enables
forwarding rate at full wire speed
- Self-learning mechanism
- Supports up to 8K Unicast addresses and
unlimited Multicast/Broadcast addresses
- Broadcast storm filtering
66MHz Fast PCI interface for switch expansion and
management CPU connection
- Up to 6 GT-48004A devices per PCI bus segment
without PCI-to-PCI bridging (24 ports)
- Up to 32 GalNet devices in a single switch
- Standard CPU connection for management (66
MHz PCI connection through GT-641xx chips)
Extensive network management support
- Repeater MIB and PCI counters
- Address aging support
- Hardware assist for Spanning Tree algorithm
- RMON Station-to-Station connectivity matrix
- CPU access to Address Table
- Ability to define static addresses
- Monitoring (sniffer) mode
Packet sampling management technology
- Takes “snapshots” of packets at programmable
intervals
- Allows for the implementation of RMON with low-
cost CPUs
High observability LED interface
- Dual 3 pin serial LED interfaces give access to
over 80 internal status signals
329 pin BGA package
- Advanced 0.35 micron CMOS process
- 3.3V supply, 5V tolerant I/O
EDO
DRAM
GT-48004A
4
x
MII
MII PHY
Devices
4 x Fast Ethernet
EDO
DRAM
EDO
DRAM
GT-48004A
4
x
MII
MII PHY
Devices
4 x Fast Ethernet
EDO
DRAM
EDO
DRAM
GT-48004A
4
x
MII
MII PHY
Devices
4 x Fast Ethernet
EDO
DRAM
EDO
DRAM
GT-48004A
4
x
MII
MII PHY
Devices
4 x Fast Ethernet
EDO
DRAM
FAST PCI