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參數資料
| 型號： | HA9P4905-5Z |
| 廠商： | INTERSIL CORP |
| 元件分類： | 運動控制電子 |
| 英文描述： | Precision Quad Comparators |
| 中文描述： | QUAD COMPARATOR, 10000 uV OFFSET-MAX, 180 ns RESPONSE TIME, PDSO16 |
| 封裝： | LEAD FREE, SOIC-16 |
| 文件頁數： | 2/8頁 |
| 文件大小： | 241K |
| 代理商： | HA9P4905-5Z |
2
Absolute Maximum Ratings
Thermal Information
Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . . . . 33V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15V
Voltage Between V
LOGIC
+ and V
LOGIC
-. . . . . . . . . . . . . . . . . . .18V
Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Power Dissipation (Notes 1, 2)
Operating Conditions
Temperature Range
HA-4900-2, HA-4902-2. . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
HA-4905-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 75
o
C
Thermal Resistance (Typical, Note 3)
CERDIP Package. . . . . . . . . . . . . . . . .
PDIP Package . . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Ceramic Package) . . . . . . .175
o
C
Maximum Junction Temperature (Plastic Package). . . . . . . . .150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
85
90
100
θ
JC
(
o
C/W)
25
N/A
N/A
Die Characteristics
Back Side Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V-
Number of Transistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
Die Size . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 mils x 105 mils
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Maximum power dissipation, including output load, must be designed to maintain the junction temperature below 175
o
C for ceramic packages,
and below 150
o
C for plastic packages.
2. Total Power Dissipation (T.P.D.) is the sum of individual dissipation contributions of V+, V- and V
LOGIC
shown in curves of Power Dissipation
vs Supply Voltages (see Performance Curves). The calculated T.P.D. is then located on the graph of Maximum Allowable Package Dissipation
vs Ambient Temperature to determine ambient temperature operating limits imposed by the calculated T.P.D. (See Performance Curves). For
instance, the combination of +15V, -15V, +5V, 0V (V+, V-, V
LOGIC
+, V
LOGIC
-) gives a T.P.D. of 350mW, the combination +15V, -15V, +15V,
0V gives a T.P.D. of 450mW.
3.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V
SUPPLY
= ±15V, V
LOGIC
+ = 5V, V
LOGIC
- = GND
PARAMETER
TEMP
(
o
C)
HA-4900-2
-55
o
C to 125
o
C
HA-4902-2
-55
o
C to 125
o
C
HA-4905-5
0
o
C to 75
o
C
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
INPUT CHARACTERISTICS
Offset Voltage (Note 4)
25
-
2
3
-
2
5
-
4
7.5
mV
Full
-
-
4
-
-
8
-
-
10
mV
Offset Current
25
-
10
25
-
10
35
-
25
50
nA
Full
-
-
35
-
-
45
-
-
70
nA
Bias Current (Note 5)
25
-
50
75
-
50
150
-
100
150
nA
Full
-
-
150
-
-
200
-
-
300
nA
Input Sensitivity (Note 6)
25
-
-
V
IO
+
0.3
-
-
V
IO
+
0.5
-
-
V
IO
+
0.5
mV
Full
-
-
V
IO
+
0.4
-
-
V
IO
+
0.6
-
-
V
IO
+
0.7
mV
Common Mode Range
Full
V-
-
(V+) -
2.4
V-
-
(V+) -
2.6
V-
-
(V+) -
2.4
V
Differential Input Resistance
25
-
250
-
-
250
-
-
250
-
M
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
25
-
400
-
-
400
-
-
400
-
kV/V
Response Time (t
PD
(0))
(Note 7)
25
-
130
200
-
130
200
-
130
200
ns
Response Time (t
PD
(1))
(Note 7)
25
-
180
215
-
180
215
-
180
215
ns
HA-4900, HA-4902, HA-4905
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