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參數(shù)資料
| 型號： | HCTS161AD |
| 廠商： | Intersil Corporation |
| 元件分類： | 通用總線功能 |
| 英文描述： | Radiation Hardened Synchronous Counter |
| 中文描述： | 抗輻射能力同步計(jì)數(shù)器 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 115K |
| 代理商： | HCTS161AD |
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCTS161ADMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
16 Lead SBDIP
HCTS161AKMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
16 Lead Ceramic Flatpack
HCTS161AD/Sample
+25
o
C
Sample
16 Lead SBDIP
HCTS161AK/Sample
+25
o
C
Sample
16 Lead Ceramic Flatpack
HCTS161AHMSR
+25
o
C
Die
Die
HCTS161AMS
Radiation Hardened
Synchronous Counter
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16, LEAD FINISH C
TOP VIEW
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16, LEAD FINISH C
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
CP
P0
P1
P2
P3
GND
PE
Q0
Q1
Q2
Q3
TE
TC
MR
VCC
SPE
2
3
4
5
6
7
8
1
16
15
14
13
12
11
10
9
CP
P0
P1
P2
P3
GND
PE
MR
Q0
Q1
Q2
Q3
TE
TC
VCC
SPE
Features
3 Micron Radiation Hardened CMOS SOS
Total Dose 200K RAD (Si)
Minimum LET for SEU Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/Bit-
Day (Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
Input Logic Levels
-VIL = 0.8V Max
-VIH = VCC/2V Min
Input Current Levels Ii
≤
5
μ
A at VOL, VOH
Description
The Intersil HCTS161AMS high-reliability high-speed presettable
four-bit binary synchronous counter features asynchronous reset
and look-ahead carry logic. The HCTS161AMS has an active-low
master reset to zero, MR. A low level at the synchronous parallel
enable, SPE, disables counting and allows data at the preset
inputs (P0 - P3) to load the counter. The data is latched to the
outputs on the positive edge of the clock input, CP. The
HCTS161AMS has two count enable pins, PE and TE. TE also
controls the terminal count output, TC. The terminal count output
indicates a maximum count for one clock pulse and is used to
enable the next cascaded stage to count.
The HCTS161AMS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS161AMS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
September 1995
Spec Number
518888
File Number
2144.2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HCTS161AK | Radiation Hardened Synchronous Counter |
| HCTS161AKMSR | Radiation Hardened Synchronous Counter |
| HCTS161AMS | Radiation Hardened Synchronous Counter |
| HCTS161AHMSR | Circular Connector; No. of Contacts:55; Series:MS27472; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:16; Circular Contact Gender:Pin; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:16-35 RoHS Compliant: No |
| HCTS190DMSR | Radiation Hardened Synchronous 4-Bit Up/Down Counter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HCTS161ADMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Synchronous Counter |
| HCTS161AHMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Synchronous Counter |
| HCTS161AK | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Synchronous Counter |
| HCTS161AKMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Synchronous Counter |
| HCTS161AMS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Synchronous Counter |
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