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參數(shù)資料
| 型號： | HD74HCT125 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Quadruple 2-Input Positive-NOR Buffers With Open-Colector Outputs 14-CDIP -55 to 125 |
| 中文描述： | 四。總線緩沖器蓋茨（3態(tài)輸出） |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 47K |
| 代理商： | HD74HCT125 |
HD74HCT125/HD74HCT126
Quad. Bus Buffer Gates (with 3-state outputs)
Description
The HD74HCT125, HD74HCT126 require the 3-state control input C to be taken high to put the output
into the high impedance condition, whereas the HD74HCT125, HD74HCT126 requires the control input to
be low to put the output into high impedance.
Features
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
High Speed Operation: t
pd
(A to Y) = 12 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: V
CC
= 4.5 to 5.5 V
Low Input Current: 1 μA max
Low Quiescent Supply Current: I
CC
(static) = 4 μA max (Ta = 25°C)
Function Table
Input
C
Output Y
HCT125
HCT126
A
HD74HCT125
HD74HCT126
H
L
X
Z
Z
L
H
L
L
L
L
Notes: X: Irrelevant
Z: Off (High-impedance) state of a 3-state output.
H
H
H
H
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HD74HCT126 | Quad. Bus Buffer Gates (with 3-state outputs) |
| HD74HCT137 | 3-to-8-line Decoder/Demultiplexer with Address Latch |
| HD74HCT138 | 3-to-8-line Decoder/Demultiplexer |
| HD74HCT1G04 | High speed CMOS inverter using silicon gate CMOS process |
| HD74HCT1G08 | 2?input AND Gate |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD74HCT125P-E | 制造商:Renesas Electronics Corporation 功能描述: |
| HD74HCT1G66CME | 制造商:Renesas Electronics Corporation 功能描述: |
| HD74HCT240P | 制造商:HITACHI 功能描述: |
| HD74HCT244FP-E | 制造商:Renesas Electronics Corporation 功能描述:Logic, 74HC series, SOP-20 |
| HD74HCT244FPEL-E | 制造商:Renesas Electronics Corporation 功能描述:Logic, 74HC series, SOP-20 |
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