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參數(shù)資料
| 型號： | HI5812JIJ |
| 廠商： | INTERSIL CORP |
| 元件分類： | ADC |
| 英文描述： | CMOS 20 Microsecond, 12-Bit, Sampling A/D Converter with Internal Track and Hold |
| 中文描述： | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP24 |
| 封裝： | CERDIP-24 |
| 文件頁數(shù)： | 12/13頁 |
| 文件大小： | 427K |
| 代理商： | HI5812JIJ |
6-1800
Total Harmonic Distortion
The total harmonic distortion (THD) is the ratio of the RMS
sum of the second through sixth harmonic components to
the fundamental RMS signal for a specified input and
sampling frequency.
Spurious-Free Dynamic Range
The spurious-free dynamic range (SFDR) is the ratio of the
fundamental RMS amplitude to the RMS amplitude of the
next largest spur or spectral component. If the harmonics
are buried in the noise floor it is the largest peak.
THD = 10 Log
Total Harmonic Power (2nd - 6th Harmonic)
Sinewave Signal Power
SFDR = 10 Log
Sinewave Signal Power
Highest Spurious Signal Power
TABLE 2. CODE TABLE
CODE
DESCRIPTION
INPUT VOLTAGE
V
REF+
= 4.608V
V
REF-
= 0.0V
(V)
DECIMAL
COUNT
BINARY OUTPUT CODE
MSB
LSB
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Full Scale (FS)
4.6069
4095
1
1
1
1
1
1
1
1
1
1
1
1
FS - 1 LSB
4.6058
4094
1
1
1
1
1
1
1
1
1
1
1
0
3
/
4
FS
1
/
2
FS
1
/
4
FS
3.4560
3072
1
1
0
0
0
0
0
0
0
0
0
0
2.3040
2048
1
0
0
0
0
0
0
0
0
0
0
0
1.1520
1024
0
1
0
0
0
0
0
0
0
0
0
0
1 LSB
0.001125
1
0
0
0
0
0
0
0
0
0
0
0
1
Zero
The voltages listed above represent the ideal lower transition of each output code shown as a function of the reference voltage.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0.01
μ
F
0.1
μ
F
10
μ
F
4.7
μ
F
V
REF+
V
IN
V
AA
+
V
DD
D.
D0
DRDY
OEM
OEL
STRT
CLK
0.1
μ
F
V
REF-
V
AA-
V
SS
+5V
OUTPUT
DATA
750kHz CLOCK
0.001
μ
F
0.1
μ
F
4.7
μ
F
V
REF
ANALOG
INPUT
FIGURE 22. GROUND AND SUPPLY DECOUPLING
HI5812
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