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參數資料
| 型號： | HS1-3374RH-8 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Radiation Hardened 8-Bit Bidirectional CMOS/TTL Level Converter |
| 中文描述： | CMOS TO TTL TRANSCEIVER, TRUE OUTPUT, CDIP22 |
| 封裝： | SIDE BRAZED, CERAMIC, DIP-22 |
| 文件頁數： | 2/3頁 |
| 文件大?。?/td> | 508K |
| 代理商： | HS1-3374RH-8 |
2
Functional Block Diagram
1 OF 8 IDENTICAL CIRCUITS
NOTES:
2. Enable and disable are TTL type inputs
3. D and E outputs are common to all 8 channels
GND
2 (3, 4, 5, 6, 7, 8, 9)
A1 CMOS
INPUT (OUTPUT)
VDD
D
E
VCC
VDD
LEVEL
SHIFTER
GND
VCC
B1 TTL
OUTPUT
(INPUT)
21 (20, 19,
18, 17, 16,
15, 14)
ENABLE
DISABLE
13
10
GND
GND
VDD
VDD
D
E
LEVEL
SHIFTER
LEVEL
SHIFTER
INPUT (OUTPUT)
OUTPUT (INPUT)
DATA
TERMINAL
NUMBER
DATA
TERMINAL
NUMBER
A0
2
B0
21
A1
3
B1
20
A2
4
B2
19
A3
5
B3
18
A4
6
B4
17
A5
7
B5
16
A6
8
B6
15
A7
9
B7
14
TRUTH TABLE
ENABLE
DISABLE
FUNCTION
X
0
Convert CMOS Level to TTL Level
1
1
Convert TTL Level to CMOS Level
0
1
High Impedance (Z)
0 = Low Level
Z = High Impedance on Both CMOS and TTL sides.
NOTE: An important caveat that is applicable to CMOS devices in
general is that unused inputs should never be left floating. This rule
applies to inputs connected to a three-state bus. The need for
external pull-up resistors during three-state bus conditions is
eliminated by the presence of regenerative latches on the following
HS-3374RH pins: A0 - 7.
The functional block diagram depicts one of these pins with the
regenerative latch. When the CMOS driver assumes the high
impedance state, the latch holds the bus in whatever logic state
(high or low) it was before the three-state condition. A transient
drive current of
±
1.5mA at VDD/2
±
0.5V for 10ns is required to
switch the latch. Thus, CMOS device inputs connected to the bus
are not allowed to float during three-state conditions.
WARNING: Do not activate the Disable input by hardwiring to any
TTL input pins. This is an incorrect mode of operation.
1 = High Level
X = Don’t Care
HS-3374RH
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