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參數資料
| 型號： | HS1-81C55RH-Q |
| 廠商： | INTERSIL CORP |
| 元件分類： | DRAM |
| 英文描述： | Radiation Hardened 256 x 8 CMOS RAM |
| 中文描述： | 256 X 8 MULTI-PORT SRAM, CDIP40 |
| 封裝： | SIDE BRAZED, CERAMIC, DIP-40 |
| 文件頁數： | 10/11頁 |
| 文件大小： | 122K |
| 代理商： | HS1-81C55RH-Q |
10
Bits 6-7 (TM2 and TM1) of command register contents are
used to start and stop the counter. there are four commands
to choose from:
Note that while the counter is counting, you may load a new
count and mode into the count length registers. Before the
new count and mode will be used by the counter, you
must
issue a START command to the counter. This applies even
thought you may only want to change the count and use the
previous mode.
In case of an odd-numbered count, the first half-cycle of the
squarewave output, which is high, is one count longer than
the second (low) half-cycle, as shown in Figure 10.
The counter in the HS-81C55/56RH is not initialized to any
particular mode or count when hardware RESET occurs, but
RESET does stop the counting. Therefore, counting cannot
begin following RESET until a START command is issued
via the C/S register.
Please note that the timer circuit on the HS-81C55/56RH
chip is designed to be a square-wave timer, not an event
counter. To achieve this, it counts down by twos twice in
completing one cycle. Thus, its registers do not contain
values directly representing the number of TIMER IN pulses
received. You cannot load an initial value of 1 into the count
register and cause the timer to operate, as its terminal count
value is 10 (binary) or 2 (decimal). (For the detection of
single pulses, it is suggested that one of the hardware
interrupt pins on the HS-80C85RH be used.) After the timer
has started counting down, the values residing in the count
registers can be used to calculate the actual number of
TIMER IN pulses required to complete the timer cycle if
desired. To obtain the remaining count, perform the following
operations in order:
1. Stop the count
2. Read in the 16-bit value from the count length registers
3. Reset the upper two mode bits
4. Reset the carry and rotate right one position all 16 bits
through carry
5. If carry is set, add 1/2 of the full original count (1/2 full
count - 1 if full count is odd).
NOTE: If you started with an odd count and you read the
count length register before the third count pulse occurs, you
will not be able to discern whether one or two counts has
occurred. Regardless of this, the HS-81C55/56RH always
counts out the right number of pulses in generating the
TIMER OUT waveforms.
TM2
TM1
0
0
NOP - Do not affect counter operation
0
1
STOP-NOP - If timer has not started; stop
counting if the timer is running
1
0
STOP AFTER TC - Stop immediately after
present TC is reached (NOP if timer has not
started)
1
1
START - Load mode and CNT length and start
immediately after loading (if timer is not
presently running). If timer is running, start the
new mode and CNT length immediately after
present TC is reached.
TIMER OUT WAVEFORMS:
START
COUNT
TERMINAL
COUNT
(TERMINAL
COUNT)
0
0
1
1
0
1
0
1
1. SINGLE SQ.
WAVE
2. CONTINUOUS
SQ. WAVE
4. CONTINUOUS
PULSES
MODE BITS
M2 M1
3. SINGLE PULSE
ON TERM. COUNT
FIGURE 9. TIMER MODES
5
4
FIGURE 10. ASYMMETRICAL SQUARE-WAVE OUTPUT
RESULTING FROM COUNT OF 9
HS-81C55RH, HS-81C56RH
相關PDF資料 |
PDF描述 |
|---|---|
| HS1-81C56RH-8 | Radiation Hardened 256 x 8 CMOS RAM |
| HS1-81C56RH-Q | Radiation Hardened 256 x 8 CMOS RAM |
| HS1100 | RELATIVE HUMIDITY SENSOR |
| HS1101 | RELATIVE HUMIDITY SENSOR |
| HS13 | HIGH EFFICIENCY RECTIFIERS(1.0A,50-400V) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HS1-81C56RH | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 256 x 8 CMOS RAM |
| HS1-81C56RH-8 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 256 x 8 CMOS RAM |
| HS1-81C56RH-Q | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened 256 x 8 CMOS RAM |
| HS1820A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
| HS1820B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC |
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