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參數資料
| 型號： | HT6116-70 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | CMOS 2K??8-Bit SRAM |
| 中文描述： | 的CMOS 2K？？8位SRAM |
| 文件頁數： | 7/10頁 |
| 文件大小： | 305K |
| 代理商： | HT6116-70 |
Write cycle 1
(1)
Write cycle 2
(1, 6)
Notes:
(1) WE must be high during all address transitions.
(2) A write occurs during the overlap (t
WP
) of a low CS and a low WE .
(3) t
WR
is measured from the earlier of CS or WE going high to the end of the write cycle.
(4) During this period, I/O pins are in the output state, so the input signals of the opposite
phase to the outputs must not be applied.
(5) If the CS low transition occurs simultaneously with the WE low transitions or after
the WE transition, outputs remain in a high impedance state.
HT6116-70
7
3rd J uly ’97
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相關代理商/技術參數 |
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| HT6116-70(24DIP) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
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| HT6116-70(24SOIC) | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| HT6116-70-24DIP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:IC-16K CMOS SRAM |
| HT6116-70S-24SOP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:IC-SM-16K CMOS SRAM |
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