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參數資料
| 型號： | HT82A850R |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | Audio MCU |
| 中文描述： | 音頻控制器 |
| 文件頁數： | 18/41頁 |
| 文件大小： | 296K |
| 代理商： | HT82A850R |
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HT82A850R
Rev. 1.10
18
July 25, 2007
The DAC_Limit_L and DAC_Limit_H registers are used to define the 16-bit DAC output limit. DAC_Limit_L and
DAC_Limit_H have unsigned values. If the 16-bit data from the Host exceeds the range defined by the DAC_Limit_L
and DAC_Limit_H, the output digital code to the DAC will be clamped.
DAC_Limit_L
DAC output limit low byte
DAC_Limit_H
DAC output limit high byte
Example to set the DAC output limit value:
;-----------------------------------------------------------
; Set DAC Limit Value=FF00H
;-----------------------------------------------------------
clr
[02DH]
set
[02EH]
;-----------------------------------------------------------
; Set DAC Limit low byte=00H
; Set DAC Limit high byte=FFH
In order to prevent speaker popping sounds, the power amplifier should be setup to output a value of VDD/2, imple-
mented by sending 8000H to the DAC, during the initial power on state. Afalling edge on the DAC_WR_TRIG bit (bit 3
of DAC_WR register), will write the values in the DAC_Limit_L and DAC_Limit_H registers into the DAC.
Bit No.
Label
R/W
Power-on
Functions
0~2, 4~7
R
0
Undefined bit, read as 0 .
3
DAC_WR_TRIG
R/W
0
DAC write trigger bit
DAC_WR (2FH) Register
Example to avoid speaker popping noise:
System_Initial:
;-----------------------------------------------------------
; Avoid Pop Noise
;-----------------------------------------------------------
mov
a,WDTS
mov
FIFO_TEMP,a
mov
a,01010000b
andm
a,WDTS
mov
a,01010000b
orm
a,WDTS
clr
[02DH]
mov
a,80H
mov
[02EH],a
nop
;Write 8000H to DAC
set
[02FH].3
nop
clr
[02FH].3
nop
;-----------------------------------------------------------
mov
a,FIFO_TEMP
mov
WDTS,a
;-----------------------------------------------------------
;Save WDTS value
;Enter DAC Write Data mode, high nibble of WDTS=0101b
;Set DAC data low byte=00H
;Set DAC data high byte=80H
;Restore WDTS value
;Quit DAC Write Data mode
Note: When in the DAC write data mode(high nibble of WDTS register is 0101b), the DAC_Limit_Land DAC_Limit_H
registers will be used as the 16-bit DAC input data registers during the falling edge of the DAC_WR_TRIG. Oth-
erwise, these two registers are used to define the 16-bit DAC output limits.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| HT82A851R | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:USB Audio MCU |
| HT82B40A | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O MCU with USB Interface |
| HT82B40R | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O MCU with USB Interface |
| HT82B40R_11 | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O MCU with USB Interface |
| HT82B42R | 制造商:HOLTEK 制造商全稱:Holtek Semiconductor Inc 功能描述:I/O MCU with USB Interface |
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