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參數資料
型號: HT82A850R
廠商: Holtek Semiconductor Inc.
英文描述: Audio MCU
中文描述: 音頻控制器
文件頁數: 19/41頁
文件大小: 296K
代理商: HT82A850R
HT82A850R
Rev. 1.10
19
July 25, 2007
Digital PGA
Bit No.
Label
Functions
0~5
PGA0~PGA5
Digital PGA control bits with range 0~19.5 dB. The PGA is a digital amplifier used to
amplify the 16-bit data that comes from the PCM ADC. The PGA value versus gain
relationship is shown in the following table.
6
ADC_RESET
ADC_RESET= 1 : PCM ADC at reset condition
ADC_RESET= 0 : PCM ADC during normal operation - default=0
The following conditions will reset the ADC:
- MCU Reset
- Set ADC_RESET to 1 using the program
7
MUTE_MKB
Microphone mute Control:
MUTE_MKB =0: Mute microphone input.
MUTE_MKB =1: Normal.
PGA_CTRL Register
PGA_CRTL Value (PGA5~PGA0)
Gain (dB)
000000
0
000001
0.5
:
:
:
:
100111
19.5
101000
19.5
:
:
:
:
111111
19.5
PFD Control
Label
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PFDC
0
PRES1
PRES0
PFDEN
0
0
PFD_IO
SELW
PFDD
PFDD7
PFDD6
PFDD5
PFDD4
PFDD3
PFDD2
PFDD1
PFDD0
PFDC (31H), PFDD (32H) Register
A Programmable Frequency Divider, PFD, is implemented within the HT82A850R. It is composed of two sections, a
prescaler and a general counter.
Theprescaleriscontrolledbytheregisterbits,PRES0andPRES1.The4-stageprescalerisdividedby16.Thegeneral
counter is programmed by an 8-bit register known as PFDD.
The PFDD is write inhibited while the PFD is disabled. To modify the PFDD contents, the PFD must be enabled. When
the generator is disabled, the PFDD is cleared by hardware.
PFD prescaler selection:
PRES1
PRES0
Prescaler Output
0
0
PFD frequency source
1
0
1
PFD frequency source
2
1
0
PFD frequency source
4
1
1
PFD frequency source
8
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