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參數資料
型號: HT82A851R
廠商: Holtek Semiconductor Inc.
英文描述: USB Audio MCU
中文描述: USB音頻控制器
文件頁數: 7/43頁
文件大小: 304K
代理商: HT82A851R
HT82A851R
Rev. 1.20
7
June 15, 2007
In such cases errors can occur. Therefore, using the
table read instruction in the main routine and the ISR
simultaneously should be avoided. However, if the ta-
ble read instruction has to be used in both the main
routine and the ISR, the interrupt should be disabled
prior to the table read instruction. It should not be
re-enabled until TBLH has been backed up.
All table related instructions require two cycles to
complete the operation. These areas may function as
normal program memory depending upon require-
ments.
Stack Register
STACK
This is a special part of the memory which is used to
save the contents of the program counter only. The
stackisorganisedinto16levelsandisneitherpartofthe
data nor part of the program space, and is neither
readable nor writeable. The activated level is indexed by
the stack pointer, SP, which is neither readable nor
writeable. At a subroutine call or interrupt acknowledge
signal, the contents of the program counter are pushed
onto the stack. At the end of a subroutine or an interrupt
routine, signaled by a return instruction, RET or RETI,
the program counter is restored to its previous value
from the stack. After a chip reset, the SP will point to the
top of the stack.
If the stack is full and a non-masked interrupt takes
place, the interrupt request flag will be recorded but the
acknowledge signal will be inhibited. When the stack
pointer is decremented, using RET or RETI, the
interrupt will be serviced. This feature prevents a stack
overflow allowing the programmer to use the structure
more easily. In a similar case, if the stack is full and a
CALL is subsequently executed, a stack overflow will
occur and the first entry will be lost. Only the most recent
16 return addresses are stored.
Data Memory
RAM
The data memory is divided into two functional groups.
These are the special function registers and the general
purpose data memory in Bank0 and Bank1: 384 8 bits.
Most are read/write, but some are read only. The special
function registers are overlapped in all banks.
Any unused space before 40H is reserved for future
expanded usage and if read will return a value of 00H .
Thegeneralpurposedatamemory,addressedfrom40H
to FFH, is used for data and control information under
instruction commands.
All data memory areas can handle arithmetic, logical,
increment, decrement and rotate operations directly.
Except for some dedicated bits, each bit in the data
memory can be set and reset by SET [m].i and CLR
[m].i . They are also indirectly accessible through the
memory pointer registers, MP0 or MP1.
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RAM Mapping
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