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參數資料
| 型號： | HW3000M |
| 廠商： | Lineage Power |
| 英文描述： | Home Phoneline Networking Physical Layer(主電話線網絡物理層) |
| 中文描述： | 家庭電話線網絡物理層（主電話線網絡物理層） |
| 文件頁數： | 1/6頁 |
| 文件大小： | 142K |
| 代理商： | HW3000M |
Preliminary Product Brief
August 2000
HW3000M/HW2000 Home Wire
TM
Home Phoneline Networking Physical Layer
PHY Features
I
Highly integrated home phoneline networking
physical layer (PHY) solution with 802.3u-compati-
ble media independent interface (MII):
— HW3000M HomePNA* PHY
— HW2000 analog front end (AFE)
I
Ideally suited for applications requiring add-on
HomePNAfunctionality:
— USB-HomePNAadapters
— PC motherboards
I
Support for the HomePNAInterface Specification
2.0:
— Adaptive rate selection: 1 Mbit/s to 16 Mbits/s
— Packet buffering, collision detection, and
retransmission logic adhere to HomePNA 2.0
medium-specific demands
I
Compliant with HomePNA PHY Specification 1.1:
— Integrated 1 Mbit/s PHY on the HW3000M.
— Automatically selects between HomePNA
Revision 1.1/2.0 modulation and protocol based
on capabilities of partner station on the network
I
Support for multimedia and real-time applications
using priority-based queuing quality of service
(QoS):
— Implements eight levels of packet priority
I
Host configuration and status monitoring entirely
through an MDIO/MDC interface
I
Intelligent power management capabilities:
— Disable Tx and Rx logic under idle conditions
I
Support for various loopback test modes, including
loopback test at the digital interface to the inte-
grated HomePNA 1.1 PHY
I
Compatible with existing services:
— Voice
— V.90 and emerging V.92 analog modes
— G.Lite splitterless DSL (G.992.2)
— Full-rate DSL (G.992.1)
— ISDN
I
Highly integrated HW2000 AFE:
— Support for all HomePNA 2.0 front-end transmit
and receive operations
— Minimal additional components required
— 10-bit ADC and DAC
— Integrated crystal oscillator: 28 MHz fundamen-
tal mode crystal
— On-chip filtering
I
Low-power, 3.3 V, 0.20 μm technology
I
100-pin TQFP
Media Independent Interface
I
IEEE
802.3u-compatible media independent inter-
face (MII):
— Enhanced mode operation on MII
— Direct connection to external media access con-
trollers (MACs)
— Support for universal serial bus (USB)-local
area network (LAN) controllers
I
Provides 24 MHz ± 5% Tx and Rx clocks to the
external system MAC
Additional Chip Set Features
I
LED support:
— Link activity
— Rx activity
— Tx activity
— Collision detect
— Carrier sense
I
IEEE 1149.1 compliant JTAG test access port
* HomePNA is an acroynym for Home Phoneline Networking Alli-
ance. It is a trademark of HomePNA, Inc.
IEEE is a registered trademark of The Institute of Electrical and
Electronics Engineers, Inc.
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