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參數資料
| 型號： | HWB1151 |
| 廠商： | Intersil Corporation |
| 英文描述： | () |
| 中文描述： | （） |
| 文件頁數： | 7/13頁 |
| 文件大小： | 135K |
| 代理商： | HWB1151 |
7
C_RX_PE (I) Pin 27
This signal, when asserted high, enables the receiver
section of the Modulator/Demodulator and RF/IF Up/Down
converter circuits.
C_SYNTH_LE (I) Pin 21
SYNTH_LE, CLK/SYNTH_CLK and SD/SYNTH_DATA
signals are used to program the synthesizer. SYNTH_LE
latches a frame of 22 bits after it has been shifted by the
CLK/SYNTH_CLK into the synthesizer registers. Please
note that the clock and data lines are shared also by the
baseband processor
C_OSC_START (I) Pin 11
This signal is an active low pulse which ensures start-up of
the VCO (see Figure 5). Some brands of VCO’s will not
reliably start oscillating at low control voltages due to the
reduced tank circuit Q caused by this condition. This line
forces the control pin on the VCO to the +3.5V supply rail to
ensure oscillator start-up. The currently recommended
Motorola KXN1332A VCO does not require activation of this
line.
C_SYNTH_LD (O) Pin 48
Lock detect signal coming back from the synthesizer which
signals an out-of-lock condition in either Phase Lock Loop.
May be used to inhibit transmit under these conditions. High
state when out-of-lock.
C_TEST_CK (I) Pin 38
Clock signal used to read the test data from the Baseband
Processor (see the HFA3860B Data Sheet).
C_TEST7 through C_TEST0 (O) Pins 39-46
Reads out the test data from the Baseband Processor (see
the HFA3860B Data Sheet).
Radio Card Programming
Programming Sequence
1. At power up, set all input signals to default values, see
Table 1.
2. Set signal values to baseband processor programming
mode (see Figures 2, 3).
3. Program baseband processor as specified in technical
data sheet. Example is provided below.
4. Set signal values to synthesizer programming mode (see
Figure 4).
5. Program synthesizer as specified in technical data sheet.
Example is provided below.
6. Start TX or RX sequence.
Important -
If power is removed from the card, all set ups
will be lost.
All (I) signals are input signals into this card. These signals
are assumed to be controlled by a MAC (Media Access
Controller) and are to be programmed as specified.
Examples are provided as reference only.
TABLE 1. CONTROL SIGNAL DEFAULT VALUES
CONTROL SIGNAL
VALUE
C_PA_PE (I)
Low
C_TXD (I)
Do Not Care
C_RX_PE_BB (I)
Low
C_SPD (I/O)
Do Not Care
C_SP_CLK (I)
Low
C_R_WB (I)
Do Not Care
C_BB_CS(I)
High
C_RESET_BB (I)
High
C_RADIO_PE (I)
High
C_TX_PE (I)
Low
C_RX_PE (I)
Low
C_SYNTH_LE (I)
Low
C_OSC_START (I)
High
C_TEST_CLK
Do Not Care
Application Note 9835
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