- 您現在的位置：買賣IC網 > PDF目錄385413 > HY27SA081G1M (Hynix Semiconductor Inc.) 1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory PDF資料下載
參數資料
| 型號： | HY27SA081G1M |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | 1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
| 中文描述： | 1Gbit的（128Mx8bit / 64Mx16bit）NAND閃存 |
| 文件頁數： | 14/43頁 |
| 文件大小： | 729K |
| 代理商： | HY27SA081G1M |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁
Rev 0.5 / Oct. 2004
14
HY27UA(08/16)1G1M Series
HY27SA(08/16)1G1M Series
1Gbit (128Mx8bit / 64Mx16bit) NAND Flash
Read Memory Array
Each operation to read the memory area starts with a pointer operation as shown in the Pointer Operations section.
Once the area (main or spare) has been selected using the Read A, Read B or Read C commands four bus cycles.
The device defaults to Read A mode after powerup or a Reset operation. Devices, where page0 is read automatically at
power-up, are available on request.
When reading the spare area addresses:
- A0 to A3 (x8 devices)
- A0 to A2 (x16 devices)
are used to set the start address of the spare area while addresses:
- A4 to A7 (x8 devices)
- A3 to A7 (x16 devices)
are ignored.
Once the Read A or Read C commands have been issued they do not need to be reissued for subsequent read opera-
tions as the pointer remains in the respective area. However, the Read B command is effective for only one operation,
once an operation has been executed in Area B the pointer returns automatically to Area A and so another Read B
command is required to start another read operation in Area B.
Once a read command is issued three types of operations are available: Random Read, Page Read and Sequential Row
Read.
Random Read
Each time the command is issued the first read is Random Read.
Page Read
After the Random Read access the page data is transferred to the Page Buffer in a time of t
WHBH
(refer to Table 15 for
value). Once the transfer is complete the Ready/Busy signal goes High. The data can then be read out sequentially
(from selected column address to last column address) by pulsing the Read Enable signal.
Sequential Row Read
After the data in last column of the page is output, if the Read Enable signal is pulsed and Chip Enable remains Low
then the next page is automatically loaded into the Page Buffer and the read operation continues. A Sequential Row
Read operation can only be used to read within a block. If the block changes a new read command must be issued.
Refer to Figures 12 and 13 for details of Sequential Row Read operations. To terminate a Sequential Row Read opera-
tion set the Chip Enable signal to High for more than t
EHEL
. Sequential Row Read is not available when the Chip Enable
Don't Care option is enabled.
相關PDF資料 |
PDF描述 |
|---|---|
| HY27SA161G1M | 1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
| HY27SA1G1M | 1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
| HY27UA081G1M | 1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
| HY27UA161G1M | 1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
| HY27UA1G1M | 1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HY27SA161G1M | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
| HY27SA1G1M | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
| HY27SAXXX | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gbit (128Mx8bit / 64Mx16bit) NAND Flash Memory |
| HY27SF081G2A | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:1Gbit (128Mx8bit / 64Mx16bit) NAND Flash |
| HY27SF081G2A-F(P) | 制造商:SK Hynix Inc 功能描述: |
發布緊急采購，3分鐘左右您將得到回復。