- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄385414 > HY27SS08561M (Hynix Semiconductor Inc.) 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash PDF資料下載
參數(shù)資料
| 型號(hào)： | HY27SS08561M |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash |
| 中文描述： | 片256Mbit（32Mx8bit / 16Mx16bit）NAND閃存 |
| 文件頁(yè)數(shù)： | 10/44頁(yè) |
| 文件大小： | 733K |
| 代理商： | HY27SS08561M |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)當(dāng)前第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)
Rev 0.7 / Oct. 2004
10
HY27SS(08/16)561M Series
HY27US(08/16)561M Series
256Mbit (32Mx8bit / 16Mx16bit) NAND Flash
Data Input
Data Input bus operations are used to input the data to be programmed.
Data is accepted only when Chip Enable is Low, Address Latch Enable is Low, Command Latch Enable is Low and Read
Enable is High. The data is latched on the rising edge of the Write Enable signal. The data is input sequentially using
the Write Enable signal.
See Figure 23 and Tables 14 and 15 for details of the timings requirements.
Data Output
Data Output bus operations are used to read: the data in the memory array, the Status Register, the Electronic Signa-
ture and the Serial Number. Data is output when Chip Enable is Low, Write Enable is High, Address Latch Enable is
Low, and Command Latch Enable is Low. The data is output sequentially using the Read Enable signal.
See Figure 24 and Table 15 for details of the timings requirements.
Write Protect
Write Protect bus operations are used to protect the memory against program or erase operations. When the Write
Protect signal is Low the device will not accept program or erase operations and so the contents of the memory array
cannot be altered. The Write Protect signal is not latched by Write Enable to ensure protection even during power-up.
Standby
When Chip Enable is High the memory enters Standby mode, the device is deselected, outputs are disabled and power
consumption is reduced.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HY27SS561M | 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash |
| HY27US16561M | 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash |
| HY27US561M | 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash |
| HY27SS16561M | 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash |
| HY27US08561M | 256Mbit (32Mx8bit / 16Mx16bit) NAND Flash |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HY27SS16121A | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:512Mbit (64Mx8bit / 32Mx16bit) NAND Flash |
| HY27SS16121M | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:512Mbit (64Mx8bit / 32Mx16bit) NAND Flash |
| HY27SS16561A | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:256Mbit (32Mx8bit / 16Mx16bit) NAND Flash |
| HY27SS16561M | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:256Mbit (32Mx8bit / 16Mx16bit) NAND Flash |
| HY27SS561M | 制造商:HYNIX 制造商全稱(chēng):Hynix Semiconductor 功能描述:256Mbit (32Mx8bit / 16Mx16bit) NAND Flash |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。